1# 2# Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include plat/st/common/common.mk 8 9ARM_CORTEX_A7 := yes 10ARM_WITH_NEON := yes 11USE_COHERENT_MEM := 0 12 13# Default Device tree 14DTB_FILE_NAME ?= stm32mp157c-ev1.dtb 15 16STM32MP13 ?= 0 17STM32MP15 ?= 0 18 19ifeq ($(STM32MP13),1) 20ifeq ($(STM32MP15),1) 21$(error Cannot enable both flags STM32MP13 and STM32MP15) 22endif 23STM32MP13 := 1 24STM32MP15 := 0 25else ifeq ($(STM32MP15),1) 26STM32MP13 := 0 27STM32MP15 := 1 28else ifneq ($(findstring stm32mp13,$(DTB_FILE_NAME)),) 29STM32MP13 := 1 30STM32MP15 := 0 31else ifneq ($(findstring stm32mp15,$(DTB_FILE_NAME)),) 32STM32MP13 := 0 33STM32MP15 := 1 34endif 35 36ifeq ($(STM32MP13),1) 37# Will use SRAM2 as mbedtls heap 38STM32MP_USE_EXTERNAL_HEAP := 1 39 40# DDR controller with single AXI port and 16-bit interface 41STM32MP_DDR_DUAL_AXI_PORT:= 0 42STM32MP_DDR_32BIT_INTERFACE:= 0 43 44ifeq (${TRUSTED_BOARD_BOOT},1) 45# PKA algo to include 46PKA_USE_NIST_P256 := 1 47PKA_USE_BRAINPOOL_P256T1:= 1 48endif 49 50# STM32 image header version v2.0 51STM32_HEADER_VERSION_MAJOR:= 2 52STM32_HEADER_VERSION_MINOR:= 0 53endif 54 55ifeq ($(STM32MP15),1) 56# DDR controller with dual AXI port and 32-bit interface 57STM32MP_DDR_DUAL_AXI_PORT:= 1 58STM32MP_DDR_32BIT_INTERFACE:= 1 59 60# STM32 image header version v1.0 61STM32_HEADER_VERSION_MAJOR:= 1 62STM32_HEADER_VERSION_MINOR:= 0 63 64# Add OP-TEE reserved shared memory area in mapping 65STM32MP15_OPTEE_RSV_SHM := 1 66$(eval $(call add_defines,STM32MP15_OPTEE_RSV_SHM)) 67 68STM32MP_CRYPTO_ROM_LIB := 1 69 70# Decryption support 71ifneq ($(DECRYPTION_SUPPORT),none) 72$(error "DECRYPTION_SUPPORT not supported on STM32MP15") 73endif 74endif 75 76ifeq ($(AARCH32_SP),sp_min) 77# Disable Neon support: sp_min runtime may conflict with non-secure world 78TF_CFLAGS += -mfloat-abi=soft 79endif 80 81# Not needed for Cortex-A7 82WORKAROUND_CVE_2017_5715:= 0 83WORKAROUND_CVE_2022_23960:= 0 84 85# Number of TF-A copies in the device 86STM32_TF_A_COPIES := 2 87 88# PLAT_PARTITION_MAX_ENTRIES must take care of STM32_TF-A_COPIES and other partitions 89# such as metadata (2) to find all the FIP partitions (default is 2). 90PLAT_PARTITION_MAX_ENTRIES := $(shell echo $$(($(STM32_TF_A_COPIES) + 4))) 91 92ifeq (${PSA_FWU_SUPPORT},1) 93# Number of banks of updatable firmware 94NR_OF_FW_BANKS := 2 95NR_OF_IMAGES_IN_FW_BANK := 1 96 97FWU_MAX_PART = $(shell echo $$(($(STM32_TF_A_COPIES) + 2 + $(NR_OF_FW_BANKS)))) 98ifeq ($(shell test $(FWU_MAX_PART) -gt $(PLAT_PARTITION_MAX_ENTRIES); echo $$?),0) 99$(error "Required partition number is $(FWU_MAX_PART) where PLAT_PARTITION_MAX_ENTRIES is only \ 100$(PLAT_PARTITION_MAX_ENTRIES)") 101endif 102endif 103 104ifeq ($(STM32MP13),1) 105STM32_HASH_VER := 4 106STM32_RNG_VER := 4 107else # Assuming STM32MP15 108STM32_HASH_VER := 2 109STM32_RNG_VER := 2 110endif 111 112# Download load address for serial boot devices 113DWL_BUFFER_BASE ?= 0xC7000000 114 115# Device tree 116ifeq ($(STM32MP13),1) 117BL2_DTSI := stm32mp13-bl2.dtsi 118FDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME))) 119else 120BL2_DTSI := stm32mp15-bl2.dtsi 121FDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME))) 122ifeq ($(AARCH32_SP),sp_min) 123BL32_DTSI := stm32mp15-bl32.dtsi 124FDT_SOURCES += $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dts,$(DTB_FILE_NAME))) 125endif 126endif 127 128# Macros and rules to build TF binary 129STM32_TF_STM32 := $(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME))) 130STM32_LD_FILE := plat/st/stm32mp1/stm32mp1.ld.S 131STM32_BINARY_MAPPING := plat/st/stm32mp1/stm32mp1.S 132 133ifeq ($(AARCH32_SP),sp_min) 134# BL32 is built only if using SP_MIN 135BL32_DEP := bl32 136ASFLAGS += -DBL32_BIN_PATH=\"${BUILD_PLAT}/bl32.bin\" 137endif 138 139STM32MP_FW_CONFIG_NAME := $(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME)) 140STM32MP_FW_CONFIG := ${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME) 141ifneq (${AARCH32_SP},none) 142FDT_SOURCES += $(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME))) 143endif 144# Add the FW_CONFIG to FIP and specify the same to certtool 145$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config)) 146ifeq ($(GENERATE_COT),1) 147STM32MP_CFG_CERT := $(BUILD_PLAT)/stm32mp_cfg_cert.crt 148# Add the STM32MP_CFG_CERT to FIP and specify the same to certtool 149$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_CFG_CERT},--stm32mp-cfg-cert)) 150endif 151ifeq ($(AARCH32_SP),sp_min) 152STM32MP_TOS_FW_CONFIG := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dtb,$(DTB_FILE_NAME))) 153$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_TOS_FW_CONFIG},--tos-fw-config)) 154endif 155 156# Enable flags for C files 157$(eval $(call assert_booleans,\ 158 $(sort \ 159 PKA_USE_BRAINPOOL_P256T1 \ 160 PKA_USE_NIST_P256 \ 161 PLAT_TBBR_IMG_DEF \ 162 STM32MP_CRYPTO_ROM_LIB \ 163 STM32MP_DDR_32BIT_INTERFACE \ 164 STM32MP_DDR_DUAL_AXI_PORT \ 165 STM32MP_USE_EXTERNAL_HEAP \ 166 STM32MP13 \ 167 STM32MP15 \ 168))) 169 170$(eval $(call assert_numerics,\ 171 $(sort \ 172 PLAT_PARTITION_MAX_ENTRIES \ 173 STM32_HASH_VER \ 174 STM32_HEADER_VERSION_MAJOR \ 175 STM32_RNG_VER \ 176 STM32_TF_A_COPIES \ 177))) 178 179$(eval $(call add_defines,\ 180 $(sort \ 181 DWL_BUFFER_BASE \ 182 PKA_USE_BRAINPOOL_P256T1 \ 183 PKA_USE_NIST_P256 \ 184 PLAT_PARTITION_MAX_ENTRIES \ 185 PLAT_TBBR_IMG_DEF \ 186 STM32_HASH_VER \ 187 STM32_HEADER_VERSION_MAJOR \ 188 STM32_RNG_VER \ 189 STM32_TF_A_COPIES \ 190 STM32MP_CRYPTO_ROM_LIB \ 191 STM32MP_DDR_32BIT_INTERFACE \ 192 STM32MP_DDR_DUAL_AXI_PORT \ 193 STM32MP_USE_EXTERNAL_HEAP \ 194 STM32MP13 \ 195 STM32MP15 \ 196))) 197 198# Include paths and source files 199PLAT_INCLUDES += -Iplat/st/stm32mp1/include/ 200 201PLAT_BL_COMMON_SOURCES += plat/st/stm32mp1/stm32mp1_private.c 202 203PLAT_BL_COMMON_SOURCES += drivers/st/uart/aarch32/stm32_console.S 204 205ifneq (${ENABLE_STACK_PROTECTOR},0) 206PLAT_BL_COMMON_SOURCES += plat/st/stm32mp1/stm32mp1_stack_protector.c 207endif 208 209PLAT_BL_COMMON_SOURCES += lib/cpus/aarch32/cortex_a7.S 210 211PLAT_BL_COMMON_SOURCES += drivers/arm/tzc/tzc400.c \ 212 drivers/st/bsec/bsec2.c \ 213 drivers/st/ddr/stm32mp1_ddr_helpers.c \ 214 drivers/st/i2c/stm32_i2c.c \ 215 drivers/st/iwdg/stm32_iwdg.c \ 216 drivers/st/pmic/stm32mp_pmic.c \ 217 drivers/st/pmic/stpmic1.c \ 218 drivers/st/reset/stm32mp1_reset.c \ 219 plat/st/stm32mp1/stm32mp1_dbgmcu.c \ 220 plat/st/stm32mp1/stm32mp1_helper.S \ 221 plat/st/stm32mp1/stm32mp1_syscfg.c 222 223ifeq ($(STM32MP13),1) 224PLAT_BL_COMMON_SOURCES += drivers/st/clk/clk-stm32-core.c \ 225 drivers/st/clk/clk-stm32mp13.c \ 226 drivers/st/crypto/stm32_rng.c 227else 228PLAT_BL_COMMON_SOURCES += drivers/st/clk/stm32mp1_clk.c 229endif 230 231BL2_SOURCES += plat/st/stm32mp1/plat_bl2_mem_params_desc.c \ 232 plat/st/stm32mp1/stm32mp1_fconf_firewall.c 233 234ifeq (${PSA_FWU_SUPPORT},1) 235include drivers/fwu/fwu.mk 236endif 237 238BL2_SOURCES += drivers/st/crypto/stm32_hash.c \ 239 plat/st/stm32mp1/bl2_plat_setup.c 240 241ifeq (${TRUSTED_BOARD_BOOT},1) 242ifeq ($(STM32MP13),1) 243BL2_SOURCES += drivers/st/crypto/stm32_pka.c 244BL2_SOURCES += drivers/st/crypto/stm32_saes.c 245endif 246endif 247 248ifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),) 249BL2_SOURCES += drivers/st/mmc/stm32_sdmmc2.c 250endif 251 252ifeq (${STM32MP_RAW_NAND},1) 253BL2_SOURCES += drivers/st/fmc/stm32_fmc2_nand.c 254endif 255 256ifneq ($(filter 1,${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),) 257BL2_SOURCES += drivers/st/spi/stm32_qspi.c 258endif 259 260ifneq ($(filter 1,${STM32MP_RAW_NAND} ${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),) 261BL2_SOURCES += plat/st/stm32mp1/stm32mp1_boot_device.c 262endif 263 264ifeq (${STM32MP_UART_PROGRAMMER},1) 265BL2_SOURCES += drivers/st/uart/stm32_uart.c 266endif 267 268ifeq (${STM32MP_USB_PROGRAMMER},1) 269#The DFU stack uses only one end point, reduce the USB stack footprint 270$(eval $(call add_define_val,CONFIG_USBD_EP_NB,1U)) 271BL2_SOURCES += drivers/st/usb/stm32mp1_usb.c \ 272 plat/st/stm32mp1/stm32mp1_usb_dfu.c 273endif 274 275BL2_SOURCES += drivers/st/ddr/stm32mp1_ddr.c \ 276 drivers/st/ddr/stm32mp1_ram.c 277 278BL2_SOURCES += plat/st/stm32mp1/plat_image_load.c 279 280ifeq ($(AARCH32_SP),sp_min) 281# Create DTB file for BL32 282${BUILD_PLAT}/fdts/%-bl32.dts: fdts/%.dts fdts/${BL32_DTSI} | ${BUILD_PLAT} fdt_dirs 283 @echo '#include "$(patsubst fdts/%,%,$<)"' > $@ 284 @echo '#include "${BL32_DTSI}"' >> $@ 285 286${BUILD_PLAT}/fdts/%-bl32.dtb: ${BUILD_PLAT}/fdts/%-bl32.dts 287endif 288 289include plat/st/common/common_rules.mk 290