14353bb20SYann Gautier# 28dd2a64aSYann Gautier# Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved. 34353bb20SYann Gautier# 44353bb20SYann Gautier# SPDX-License-Identifier: BSD-3-Clause 54353bb20SYann Gautier# 64353bb20SYann Gautier 7*66b4c5c5SYann Gautier# Extra partitions used to find FIP, contains: 8*66b4c5c5SYann Gautier# metadata (2) and the FIP partitions (default is 2). 9*66b4c5c5SYann GautierSTM32_EXTRA_PARTS := 4 10*66b4c5c5SYann Gautier 11a430382fSYann Gautierinclude plat/st/common/common.mk 12a430382fSYann Gautier 134353bb20SYann GautierARM_CORTEX_A7 := yes 144353bb20SYann GautierARM_WITH_NEON := yes 154353bb20SYann GautierUSE_COHERENT_MEM := 0 164353bb20SYann Gautier 1799a5d8d0SYann Gautier# Default Device tree 1899a5d8d0SYann GautierDTB_FILE_NAME ?= stm32mp157c-ev1.dtb 1999a5d8d0SYann Gautier 2099a5d8d0SYann GautierSTM32MP13 ?= 0 2199a5d8d0SYann GautierSTM32MP15 ?= 0 2299a5d8d0SYann Gautier 23bdec516eSSebastien Pasdeloupifeq ($(STM32MP13),1) 2499a5d8d0SYann Gautierifeq ($(STM32MP15),1) 2599a5d8d0SYann Gautier$(error Cannot enable both flags STM32MP13 and STM32MP15) 2699a5d8d0SYann Gautierendif 27bdec516eSSebastien PasdeloupSTM32MP13 := 1 28bdec516eSSebastien PasdeloupSTM32MP15 := 0 2999a5d8d0SYann Gautierelse ifeq ($(STM32MP15),1) 3099a5d8d0SYann GautierSTM32MP13 := 0 3199a5d8d0SYann GautierSTM32MP15 := 1 3299a5d8d0SYann Gautierelse ifneq ($(findstring stm32mp13,$(DTB_FILE_NAME)),) 3399a5d8d0SYann GautierSTM32MP13 := 1 3499a5d8d0SYann GautierSTM32MP15 := 0 3599a5d8d0SYann Gautierelse ifneq ($(findstring stm32mp15,$(DTB_FILE_NAME)),) 3699a5d8d0SYann GautierSTM32MP13 := 0 3799a5d8d0SYann GautierSTM32MP15 := 1 3899a5d8d0SYann Gautierendif 39bdec516eSSebastien Pasdeloup 4099a5d8d0SYann Gautierifeq ($(STM32MP13),1) 41beb625f9SLionel Debieve# Will use SRAM2 as mbedtls heap 42beb625f9SLionel DebieveSTM32MP_USE_EXTERNAL_HEAP := 1 43beb625f9SLionel Debieve 44bdec516eSSebastien Pasdeloup# DDR controller with single AXI port and 16-bit interface 45bdec516eSSebastien PasdeloupSTM32MP_DDR_DUAL_AXI_PORT:= 0 46bdec516eSSebastien PasdeloupSTM32MP_DDR_32BIT_INTERFACE:= 0 47bdec516eSSebastien Pasdeloup 48beb625f9SLionel Debieveifeq (${TRUSTED_BOARD_BOOT},1) 49beb625f9SLionel Debieve# PKA algo to include 50beb625f9SLionel DebievePKA_USE_NIST_P256 := 1 51beb625f9SLionel DebievePKA_USE_BRAINPOOL_P256T1:= 1 52beb625f9SLionel Debieveendif 53beb625f9SLionel Debieve 54bdec516eSSebastien Pasdeloup# STM32 image header version v2.0 55bdec516eSSebastien PasdeloupSTM32_HEADER_VERSION_MAJOR:= 2 56bdec516eSSebastien PasdeloupSTM32_HEADER_VERSION_MINOR:= 0 5799a5d8d0SYann Gautierendif 58bdec516eSSebastien Pasdeloup 5999a5d8d0SYann Gautierifeq ($(STM32MP15),1) 6088f4fb8fSYann Gautier# DDR controller with dual AXI port and 32-bit interface 6188f4fb8fSYann GautierSTM32MP_DDR_DUAL_AXI_PORT:= 1 6288f4fb8fSYann GautierSTM32MP_DDR_32BIT_INTERFACE:= 1 6388f4fb8fSYann Gautier 642d8886acSNicolas Le Bayon# STM32 image header version v1.0 652d8886acSNicolas Le BayonSTM32_HEADER_VERSION_MAJOR:= 1 662d8886acSNicolas Le BayonSTM32_HEADER_VERSION_MINOR:= 0 67ad3e46a3SLionel DebieveSTM32MP_CRYPTO_ROM_LIB := 1 68cd791164SLionel Debieve 69cd791164SLionel Debieve# Decryption support 70cd791164SLionel Debieveifneq ($(DECRYPTION_SUPPORT),none) 71cd791164SLionel Debieve$(error "DECRYPTION_SUPPORT not supported on STM32MP15") 72cd791164SLionel Debieveendif 73bdec516eSSebastien Pasdeloupendif 742d8886acSNicolas Le Bayon 75e0e2d64fSYann GautierPKA_USE_NIST_P256 ?= 0 76e0e2d64fSYann GautierPKA_USE_BRAINPOOL_P256T1 ?= 0 77e0e2d64fSYann Gautier 78e4ee1ab9SEtienne Carriereifeq ($(AARCH32_SP),sp_min) 79e4ee1ab9SEtienne Carriere# Disable Neon support: sp_min runtime may conflict with non-secure world 80e4ee1ab9SEtienne CarriereTF_CFLAGS += -mfloat-abi=soft 81e4ee1ab9SEtienne Carriereendif 82e4ee1ab9SEtienne Carriere 834353bb20SYann Gautier# Not needed for Cortex-A7 844353bb20SYann GautierWORKAROUND_CVE_2017_5715:= 0 859b2510b6SBipin RaviWORKAROUND_CVE_2022_23960:= 0 864353bb20SYann Gautier 8768039f2dSNicolas Toromanoffifeq ($(STM32MP13),1) 8868039f2dSNicolas ToromanoffSTM32_HASH_VER := 4 8927423744SNicolas Le BayonSTM32_RNG_VER := 4 9068039f2dSNicolas Toromanoffelse # Assuming STM32MP15 9168039f2dSNicolas ToromanoffSTM32_HASH_VER := 2 9227423744SNicolas Le BayonSTM32_RNG_VER := 2 9368039f2dSNicolas Toromanoffendif 9468039f2dSNicolas Toromanoff 954b2f23e5SPatrick Delaunay# Download load address for serial boot devices 964b2f23e5SPatrick DelaunayDWL_BUFFER_BASE ?= 0xC7000000 974b2f23e5SPatrick Delaunay 982eaffd51SYann Gautier# Device tree 99d38eaf99SYann Gautierifeq ($(STM32MP13),1) 100d38eaf99SYann GautierBL2_DTSI := stm32mp13-bl2.dtsi 101d38eaf99SYann GautierFDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME))) 102d38eaf99SYann Gautierelse 1031d204ee4SYann GautierBL2_DTSI := stm32mp15-bl2.dtsi 1041d204ee4SYann GautierFDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME))) 1051d204ee4SYann Gautierifeq ($(AARCH32_SP),sp_min) 1061d204ee4SYann GautierBL32_DTSI := stm32mp15-bl32.dtsi 1071d204ee4SYann GautierFDT_SOURCES += $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dts,$(DTB_FILE_NAME))) 1081d204ee4SYann Gautierendif 1091d204ee4SYann Gautierendif 110ca88c761SYann Gautier 1112eaffd51SYann Gautier# Macros and rules to build TF binary 1122eaffd51SYann GautierSTM32_TF_STM32 := $(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME))) 113a430382fSYann GautierSTM32_LD_FILE := plat/st/stm32mp1/stm32mp1.ld.S 114a430382fSYann GautierSTM32_BINARY_MAPPING := plat/st/stm32mp1/stm32mp1.S 1152eaffd51SYann Gautier 1162eaffd51SYann Gautierifeq ($(AARCH32_SP),sp_min) 1172eaffd51SYann Gautier# BL32 is built only if using SP_MIN 1182eaffd51SYann GautierBL32_DEP := bl32 1192eaffd51SYann GautierASFLAGS += -DBL32_BIN_PATH=\"${BUILD_PLAT}/bl32.bin\" 1202eaffd51SYann Gautierendif 1212eaffd51SYann Gautier 12229332bcdSYann GautierSTM32MP_FW_CONFIG_NAME := $(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME)) 12329332bcdSYann GautierSTM32MP_FW_CONFIG := ${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME) 12429332bcdSYann Gautierifneq (${AARCH32_SP},none) 12529332bcdSYann GautierFDT_SOURCES += $(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME))) 12629332bcdSYann Gautierendif 12729332bcdSYann Gautier# Add the FW_CONFIG to FIP and specify the same to certtool 12829332bcdSYann Gautier$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config)) 129beb625f9SLionel Debieveifeq ($(GENERATE_COT),1) 130beb625f9SLionel DebieveSTM32MP_CFG_CERT := $(BUILD_PLAT)/stm32mp_cfg_cert.crt 131beb625f9SLionel Debieve# Add the STM32MP_CFG_CERT to FIP and specify the same to certtool 132beb625f9SLionel Debieve$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_CFG_CERT},--stm32mp-cfg-cert)) 133beb625f9SLionel Debieveendif 1341d204ee4SYann Gautierifeq ($(AARCH32_SP),sp_min) 1351d204ee4SYann GautierSTM32MP_TOS_FW_CONFIG := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dtb,$(DTB_FILE_NAME))) 1361d204ee4SYann Gautier$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_TOS_FW_CONFIG},--tos-fw-config)) 1371d204ee4SYann Gautierendif 1381d204ee4SYann Gautier 1392eaffd51SYann Gautier# Enable flags for C files 140327131c4SLeonardo Sandoval$(eval $(call assert_booleans,\ 141327131c4SLeonardo Sandoval $(sort \ 142beb625f9SLionel Debieve PKA_USE_BRAINPOOL_P256T1 \ 143beb625f9SLionel Debieve PKA_USE_NIST_P256 \ 144ad3e46a3SLionel Debieve STM32MP_CRYPTO_ROM_LIB \ 14588f4fb8fSYann Gautier STM32MP_DDR_32BIT_INTERFACE \ 14688f4fb8fSYann Gautier STM32MP_DDR_DUAL_AXI_PORT \ 147beb625f9SLionel Debieve STM32MP_USE_EXTERNAL_HEAP \ 148bdec516eSSebastien Pasdeloup STM32MP13 \ 149bdec516eSSebastien Pasdeloup STM32MP15 \ 1502eaffd51SYann Gautier))) 1512eaffd51SYann Gautier 1522eaffd51SYann Gautier$(eval $(call assert_numerics,\ 1532eaffd51SYann Gautier $(sort \ 1542eaffd51SYann Gautier PLAT_PARTITION_MAX_ENTRIES \ 15568039f2dSNicolas Toromanoff STM32_HASH_VER \ 156beb625f9SLionel Debieve STM32_HEADER_VERSION_MAJOR \ 15727423744SNicolas Le Bayon STM32_RNG_VER \ 158ce21ee89SYann Gautier STM32_TF_A_COPIES \ 159327131c4SLeonardo Sandoval))) 160327131c4SLeonardo Sandoval 161327131c4SLeonardo Sandoval$(eval $(call add_defines,\ 162327131c4SLeonardo Sandoval $(sort \ 1634b2f23e5SPatrick Delaunay DWL_BUFFER_BASE \ 164beb625f9SLionel Debieve PKA_USE_BRAINPOOL_P256T1 \ 165beb625f9SLionel Debieve PKA_USE_NIST_P256 \ 166ce21ee89SYann Gautier PLAT_PARTITION_MAX_ENTRIES \ 167beb625f9SLionel Debieve PLAT_TBBR_IMG_DEF \ 16868039f2dSNicolas Toromanoff STM32_HASH_VER \ 169beb625f9SLionel Debieve STM32_HEADER_VERSION_MAJOR \ 17027423744SNicolas Le Bayon STM32_RNG_VER \ 1712eaffd51SYann Gautier STM32_TF_A_COPIES \ 172ad3e46a3SLionel Debieve STM32MP_CRYPTO_ROM_LIB \ 17388f4fb8fSYann Gautier STM32MP_DDR_32BIT_INTERFACE \ 17488f4fb8fSYann Gautier STM32MP_DDR_DUAL_AXI_PORT \ 175beb625f9SLionel Debieve STM32MP_USE_EXTERNAL_HEAP \ 176bdec516eSSebastien Pasdeloup STM32MP13 \ 177bdec516eSSebastien Pasdeloup STM32MP15 \ 178327131c4SLeonardo Sandoval))) 17946554b64SNicolas Le Bayon 1802eaffd51SYann Gautier# Include paths and source files 181c9d75b3cSYann GautierPLAT_INCLUDES += -Iplat/st/stm32mp1/include/ 1824353bb20SYann Gautier 183a430382fSYann GautierPLAT_BL_COMMON_SOURCES += plat/st/stm32mp1/stm32mp1_private.c 1844353bb20SYann Gautier 185985ee0b7SJulius WernerPLAT_BL_COMMON_SOURCES += drivers/st/uart/aarch32/stm32_console.S 1864353bb20SYann Gautier 1874353bb20SYann Gautierifneq (${ENABLE_STACK_PROTECTOR},0) 1884353bb20SYann GautierPLAT_BL_COMMON_SOURCES += plat/st/stm32mp1/stm32mp1_stack_protector.c 1894353bb20SYann Gautierendif 1904353bb20SYann Gautier 1914353bb20SYann GautierPLAT_BL_COMMON_SOURCES += lib/cpus/aarch32/cortex_a7.S 1924353bb20SYann Gautier 193d304158eSYann GautierPLAT_BL_COMMON_SOURCES += drivers/arm/tzc/tzc400.c \ 194072d7532SNicolas Le Bayon drivers/st/bsec/bsec2.c \ 19510a511ceSYann Gautier drivers/st/ddr/stm32mp1_ddr_helpers.c \ 196435832abSYann Gautier drivers/st/i2c/stm32_i2c.c \ 19773680c23SYann Gautier drivers/st/iwdg/stm32_iwdg.c \ 19823684d0eSYann Gautier drivers/st/pmic/stm32mp_pmic.c \ 19923684d0eSYann Gautier drivers/st/pmic/stpmic1.c \ 2007839a050SYann Gautier drivers/st/reset/stm32mp1_reset.c \ 20173680c23SYann Gautier plat/st/stm32mp1/stm32mp1_dbgmcu.c \ 20210a511ceSYann Gautier plat/st/stm32mp1/stm32mp1_helper.S \ 203f33b2433SYann Gautier plat/st/stm32mp1/stm32mp1_syscfg.c 2044353bb20SYann Gautier 2059be88e75SGabriel Fernandezifeq ($(STM32MP13),1) 2069be88e75SGabriel FernandezPLAT_BL_COMMON_SOURCES += drivers/st/clk/clk-stm32-core.c \ 20727423744SNicolas Le Bayon drivers/st/clk/clk-stm32mp13.c \ 20827423744SNicolas Le Bayon drivers/st/crypto/stm32_rng.c 2099be88e75SGabriel Fernandezelse 2109be88e75SGabriel FernandezPLAT_BL_COMMON_SOURCES += drivers/st/clk/stm32mp1_clk.c 2119be88e75SGabriel Fernandezendif 2129be88e75SGabriel Fernandez 213a430382fSYann GautierBL2_SOURCES += plat/st/stm32mp1/plat_bl2_mem_params_desc.c \ 2144584e01dSLionel Debieve plat/st/stm32mp1/stm32mp1_fconf_firewall.c 2151d204ee4SYann Gautier 216a430382fSYann GautierBL2_SOURCES += drivers/st/crypto/stm32_hash.c \ 2174353bb20SYann Gautier plat/st/stm32mp1/bl2_plat_setup.c 2184353bb20SYann Gautier 219beb625f9SLionel Debieveifeq (${TRUSTED_BOARD_BOOT},1) 220beb625f9SLionel Debieveifeq ($(STM32MP13),1) 221a430382fSYann GautierBL2_SOURCES += drivers/st/crypto/stm32_pka.c 222a430382fSYann GautierBL2_SOURCES += drivers/st/crypto/stm32_saes.c 223beb625f9SLionel Debieveendif 224beb625f9SLionel Debieveendif 225beb625f9SLionel Debieve 22646554b64SNicolas Le Bayonifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),) 227a430382fSYann GautierBL2_SOURCES += drivers/st/mmc/stm32_sdmmc2.c 22846554b64SNicolas Le Bayonendif 229aec7de41SYann Gautier 23012e21dfdSLionel Debieveifeq (${STM32MP_RAW_NAND},1) 231a430382fSYann GautierBL2_SOURCES += drivers/st/fmc/stm32_fmc2_nand.c 232b1b218fbSLionel Debieveendif 233b1b218fbSLionel Debieve 234b1b218fbSLionel Debieveifneq ($(filter 1,${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),) 235a430382fSYann GautierBL2_SOURCES += drivers/st/spi/stm32_qspi.c 236b1b218fbSLionel Debieveendif 237b1b218fbSLionel Debieve 238b1b218fbSLionel Debieveifneq ($(filter 1,${STM32MP_RAW_NAND} ${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),) 239b1b218fbSLionel DebieveBL2_SOURCES += plat/st/stm32mp1/stm32mp1_boot_device.c 24012e21dfdSLionel Debieveendif 24112e21dfdSLionel Debieve 2429083fa11SPatrick Delaunayifeq (${STM32MP_UART_PROGRAMMER},1) 243a430382fSYann GautierBL2_SOURCES += drivers/st/uart/stm32_uart.c 2449083fa11SPatrick Delaunayendif 2459083fa11SPatrick Delaunay 246fa92fef0SPatrick Delaunayifeq (${STM32MP_USB_PROGRAMMER},1) 247fa92fef0SPatrick Delaunay#The DFU stack uses only one end point, reduce the USB stack footprint 248fa92fef0SPatrick Delaunay$(eval $(call add_define_val,CONFIG_USBD_EP_NB,1U)) 2499083fa11SPatrick DelaunayBL2_SOURCES += drivers/st/usb/stm32mp1_usb.c \ 250fa92fef0SPatrick Delaunay plat/st/stm32mp1/stm32mp1_usb_dfu.c 251fa92fef0SPatrick Delaunayendif 252fa92fef0SPatrick Delaunay 253a430382fSYann GautierBL2_SOURCES += drivers/st/ddr/stm32mp1_ddr.c \ 25410a511ceSYann Gautier drivers/st/ddr/stm32mp1_ram.c 25510a511ceSYann Gautier 2561d204ee4SYann Gautierifeq ($(AARCH32_SP),sp_min) 2571d204ee4SYann Gautier# Create DTB file for BL32 2581d204ee4SYann Gautier${BUILD_PLAT}/fdts/%-bl32.dts: fdts/%.dts fdts/${BL32_DTSI} | ${BUILD_PLAT} fdt_dirs 2597c4e1eeaSChris Kay $(q)echo '#include "$(patsubst fdts/%,%,$<)"' > $@ 2607c4e1eeaSChris Kay $(q)echo '#include "${BL32_DTSI}"' >> $@ 2611d204ee4SYann Gautier 2621d204ee4SYann Gautier${BUILD_PLAT}/fdts/%-bl32.dtb: ${BUILD_PLAT}/fdts/%-bl32.dts 2631d204ee4SYann Gautierendif 2641d204ee4SYann Gautier 265a430382fSYann Gautierinclude plat/st/common/common_rules.mk 266