xref: /rk3399_ARM-atf/plat/st/stm32mp1/platform.mk (revision 7f690c3786224d000ff53f459f1bdb6ad05dc1d1)
14353bb20SYann Gautier#
271ba1647SYann Gautier# Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved.
34353bb20SYann Gautier#
44353bb20SYann Gautier# SPDX-License-Identifier: BSD-3-Clause
54353bb20SYann Gautier#
64353bb20SYann Gautier
766b4c5c5SYann Gautier# Extra partitions used to find FIP, contains:
866b4c5c5SYann Gautier# metadata (2) and the FIP partitions (default is 2).
966b4c5c5SYann GautierSTM32_EXTRA_PARTS	:=	4
1066b4c5c5SYann Gautier
11a430382fSYann Gautierinclude plat/st/common/common.mk
12a430382fSYann Gautier
134353bb20SYann GautierARM_CORTEX_A7		:=	yes
144353bb20SYann GautierARM_WITH_NEON		:=	yes
154353bb20SYann GautierUSE_COHERENT_MEM	:=	0
164353bb20SYann Gautier
1799a5d8d0SYann Gautier# Default Device tree
1899a5d8d0SYann GautierDTB_FILE_NAME		?=	stm32mp157c-ev1.dtb
1999a5d8d0SYann Gautier
20701178dcSMaxime MéréTF_CFLAGS 		+=	-DSTM32MP1X
21701178dcSMaxime Méré
2299a5d8d0SYann GautierSTM32MP13		?=	0
2399a5d8d0SYann GautierSTM32MP15		?=	0
2499a5d8d0SYann Gautier
25bdec516eSSebastien Pasdeloupifeq ($(STM32MP13),1)
2699a5d8d0SYann Gautierifeq ($(STM32MP15),1)
2799a5d8d0SYann Gautier$(error Cannot enable both flags STM32MP13 and STM32MP15)
2899a5d8d0SYann Gautierendif
29bdec516eSSebastien PasdeloupSTM32MP13		:=	1
30bdec516eSSebastien PasdeloupSTM32MP15		:=	0
3199a5d8d0SYann Gautierelse ifeq ($(STM32MP15),1)
3299a5d8d0SYann GautierSTM32MP13		:=	0
3399a5d8d0SYann GautierSTM32MP15		:=	1
3499a5d8d0SYann Gautierelse ifneq ($(findstring stm32mp13,$(DTB_FILE_NAME)),)
3599a5d8d0SYann GautierSTM32MP13		:=	1
3699a5d8d0SYann GautierSTM32MP15		:=	0
3799a5d8d0SYann Gautierelse ifneq ($(findstring stm32mp15,$(DTB_FILE_NAME)),)
3899a5d8d0SYann GautierSTM32MP13		:=	0
3999a5d8d0SYann GautierSTM32MP15		:=	1
4099a5d8d0SYann Gautierendif
41bdec516eSSebastien Pasdeloup
4299a5d8d0SYann Gautierifeq ($(STM32MP13),1)
43beb625f9SLionel Debieve# Will use SRAM2 as mbedtls heap
44beb625f9SLionel DebieveSTM32MP_USE_EXTERNAL_HEAP :=	1
45beb625f9SLionel Debieve
46bdec516eSSebastien Pasdeloup# DDR controller with single AXI port and 16-bit interface
47bdec516eSSebastien PasdeloupSTM32MP_DDR_DUAL_AXI_PORT:=	0
48bdec516eSSebastien PasdeloupSTM32MP_DDR_32BIT_INTERFACE:=	0
49bdec516eSSebastien Pasdeloup
50beb625f9SLionel Debieveifeq (${TRUSTED_BOARD_BOOT},1)
51beb625f9SLionel Debieve# PKA algo to include
52beb625f9SLionel DebievePKA_USE_NIST_P256	:=	1
53beb625f9SLionel DebievePKA_USE_BRAINPOOL_P256T1:=	1
54beb625f9SLionel Debieveendif
55beb625f9SLionel Debieve
56bdec516eSSebastien Pasdeloup# STM32 image header version v2.0
57bdec516eSSebastien PasdeloupSTM32_HEADER_VERSION_MAJOR:=	2
58bdec516eSSebastien PasdeloupSTM32_HEADER_VERSION_MINOR:=	0
5999a5d8d0SYann Gautierendif
60bdec516eSSebastien Pasdeloup
6199a5d8d0SYann Gautierifeq ($(STM32MP15),1)
6288f4fb8fSYann Gautier# DDR controller with dual AXI port and 32-bit interface
6388f4fb8fSYann GautierSTM32MP_DDR_DUAL_AXI_PORT:=	1
6488f4fb8fSYann GautierSTM32MP_DDR_32BIT_INTERFACE:=	1
6588f4fb8fSYann Gautier
662d8886acSNicolas Le Bayon# STM32 image header version v1.0
672d8886acSNicolas Le BayonSTM32_HEADER_VERSION_MAJOR:=	1
682d8886acSNicolas Le BayonSTM32_HEADER_VERSION_MINOR:=	0
69ad3e46a3SLionel DebieveSTM32MP_CRYPTO_ROM_LIB :=	1
70cd791164SLionel Debieve
71cd791164SLionel Debieve# Decryption support
72cd791164SLionel Debieveifneq ($(DECRYPTION_SUPPORT),none)
73cd791164SLionel Debieve$(error "DECRYPTION_SUPPORT not supported on STM32MP15")
74cd791164SLionel Debieveendif
75bdec516eSSebastien Pasdeloupendif
762d8886acSNicolas Le Bayon
77e0e2d64fSYann GautierPKA_USE_NIST_P256	?=	0
78e0e2d64fSYann GautierPKA_USE_BRAINPOOL_P256T1 ?=	0
79e0e2d64fSYann Gautier
80e4ee1ab9SEtienne Carriereifeq ($(AARCH32_SP),sp_min)
81e4ee1ab9SEtienne Carriere# Disable Neon support: sp_min runtime may conflict with non-secure world
82e4ee1ab9SEtienne CarriereTF_CFLAGS		+=	-mfloat-abi=soft
83e4ee1ab9SEtienne Carriereendif
84e4ee1ab9SEtienne Carriere
854353bb20SYann Gautier# Not needed for Cortex-A7
864353bb20SYann GautierWORKAROUND_CVE_2017_5715:=	0
879b2510b6SBipin RaviWORKAROUND_CVE_2022_23960:=	0
884353bb20SYann Gautier
8968039f2dSNicolas Toromanoffifeq ($(STM32MP13),1)
9068039f2dSNicolas ToromanoffSTM32_HASH_VER		:=	4
9127423744SNicolas Le BayonSTM32_RNG_VER		:=	4
92864466beSNicolas Le BayonSTM32_RNG_VER_MINOR	:=	2
9368039f2dSNicolas Toromanoffelse # Assuming STM32MP15
9468039f2dSNicolas ToromanoffSTM32_HASH_VER		:=	2
9527423744SNicolas Le BayonSTM32_RNG_VER		:=	2
96864466beSNicolas Le BayonSTM32_RNG_VER_MINOR	:=	1
9768039f2dSNicolas Toromanoffendif
9868039f2dSNicolas Toromanoff
994b2f23e5SPatrick Delaunay# Download load address for serial boot devices
1004b2f23e5SPatrick DelaunayDWL_BUFFER_BASE 	?=	0xC7000000
1014b2f23e5SPatrick Delaunay
1022eaffd51SYann Gautier# Device tree
103d38eaf99SYann Gautierifeq ($(STM32MP13),1)
104d38eaf99SYann GautierBL2_DTSI		:=	stm32mp13-bl2.dtsi
105d38eaf99SYann GautierFDT_SOURCES		:=	$(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME)))
106d38eaf99SYann Gautierelse
1071d204ee4SYann GautierBL2_DTSI		:=	stm32mp15-bl2.dtsi
1081d204ee4SYann GautierFDT_SOURCES		:=	$(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME)))
1091d204ee4SYann Gautierifeq ($(AARCH32_SP),sp_min)
1101d204ee4SYann GautierBL32_DTSI		:=	stm32mp15-bl32.dtsi
1111d204ee4SYann GautierFDT_SOURCES		+=	$(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dts,$(DTB_FILE_NAME)))
11271ba1647SYann Gautierifneq (,$(wildcard $(patsubst %.dtb,fdts/%-sp_min.dts,$(DTB_FILE_NAME))))
11371ba1647SYann Gautierifeq (,$(findstring -sp_min,$(DTB_FILE_NAME)))
11471ba1647SYann GautierSP_EXT			:=	-sp_min
11571ba1647SYann Gautierendif
11671ba1647SYann Gautierendif
1171d204ee4SYann Gautierendif
1181d204ee4SYann Gautierendif
119ca88c761SYann Gautier
1202eaffd51SYann Gautier# Macros and rules to build TF binary
1212eaffd51SYann GautierSTM32_TF_STM32		:=	$(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME)))
122a430382fSYann GautierSTM32_LD_FILE		:=	plat/st/stm32mp1/stm32mp1.ld.S
123a430382fSYann GautierSTM32_BINARY_MAPPING	:=	plat/st/stm32mp1/stm32mp1.S
1242eaffd51SYann Gautier
1252eaffd51SYann Gautierifeq ($(AARCH32_SP),sp_min)
1262eaffd51SYann Gautier# BL32 is built only if using SP_MIN
1272eaffd51SYann GautierBL32_DEP		:= bl32
1282eaffd51SYann GautierASFLAGS			+= -DBL32_BIN_PATH=\"${BUILD_PLAT}/bl32.bin\"
1292eaffd51SYann Gautierendif
1302eaffd51SYann Gautier
13129332bcdSYann GautierSTM32MP_FW_CONFIG_NAME	:=	$(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME))
13229332bcdSYann GautierSTM32MP_FW_CONFIG	:=	${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME)
13329332bcdSYann Gautierifneq (${AARCH32_SP},none)
13429332bcdSYann GautierFDT_SOURCES		+=	$(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME)))
13529332bcdSYann Gautierendif
13629332bcdSYann Gautier# Add the FW_CONFIG to FIP and specify the same to certtool
13729332bcdSYann Gautier$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config))
138beb625f9SLionel Debieveifeq ($(GENERATE_COT),1)
139beb625f9SLionel DebieveSTM32MP_CFG_CERT	:=	$(BUILD_PLAT)/stm32mp_cfg_cert.crt
140beb625f9SLionel Debieve# Add the STM32MP_CFG_CERT to FIP and specify the same to certtool
141beb625f9SLionel Debieve$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_CFG_CERT},--stm32mp-cfg-cert))
142beb625f9SLionel Debieveendif
1431d204ee4SYann Gautierifeq ($(AARCH32_SP),sp_min)
1441d204ee4SYann GautierSTM32MP_TOS_FW_CONFIG	:= $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dtb,$(DTB_FILE_NAME)))
1451d204ee4SYann Gautier$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_TOS_FW_CONFIG},--tos-fw-config))
1461d204ee4SYann Gautierendif
1471d204ee4SYann Gautier
1482eaffd51SYann Gautier# Enable flags for C files
149327131c4SLeonardo Sandoval$(eval $(call assert_booleans,\
150327131c4SLeonardo Sandoval	$(sort \
151beb625f9SLionel Debieve		PKA_USE_BRAINPOOL_P256T1 \
152beb625f9SLionel Debieve		PKA_USE_NIST_P256 \
153ad3e46a3SLionel Debieve		STM32MP_CRYPTO_ROM_LIB \
15488f4fb8fSYann Gautier		STM32MP_DDR_32BIT_INTERFACE \
15588f4fb8fSYann Gautier		STM32MP_DDR_DUAL_AXI_PORT \
156beb625f9SLionel Debieve		STM32MP_USE_EXTERNAL_HEAP \
157bdec516eSSebastien Pasdeloup		STM32MP13 \
158bdec516eSSebastien Pasdeloup		STM32MP15 \
1592eaffd51SYann Gautier)))
1602eaffd51SYann Gautier
1612eaffd51SYann Gautier$(eval $(call assert_numerics,\
1622eaffd51SYann Gautier	$(sort \
1632eaffd51SYann Gautier		PLAT_PARTITION_MAX_ENTRIES \
16468039f2dSNicolas Toromanoff		STM32_HASH_VER \
165beb625f9SLionel Debieve		STM32_HEADER_VERSION_MAJOR \
16627423744SNicolas Le Bayon		STM32_RNG_VER \
167864466beSNicolas Le Bayon		STM32_RNG_VER_MINOR \
168ce21ee89SYann Gautier		STM32_TF_A_COPIES \
169327131c4SLeonardo Sandoval)))
170327131c4SLeonardo Sandoval
171327131c4SLeonardo Sandoval$(eval $(call add_defines,\
172327131c4SLeonardo Sandoval	$(sort \
1734b2f23e5SPatrick Delaunay		DWL_BUFFER_BASE \
174beb625f9SLionel Debieve		PKA_USE_BRAINPOOL_P256T1 \
175beb625f9SLionel Debieve		PKA_USE_NIST_P256 \
176ce21ee89SYann Gautier		PLAT_PARTITION_MAX_ENTRIES \
177beb625f9SLionel Debieve		PLAT_TBBR_IMG_DEF \
17868039f2dSNicolas Toromanoff		STM32_HASH_VER \
179beb625f9SLionel Debieve		STM32_HEADER_VERSION_MAJOR \
18027423744SNicolas Le Bayon		STM32_RNG_VER \
181864466beSNicolas Le Bayon		STM32_RNG_VER_MINOR \
1822eaffd51SYann Gautier		STM32_TF_A_COPIES \
183ad3e46a3SLionel Debieve		STM32MP_CRYPTO_ROM_LIB \
18488f4fb8fSYann Gautier		STM32MP_DDR_32BIT_INTERFACE \
18588f4fb8fSYann Gautier		STM32MP_DDR_DUAL_AXI_PORT \
186beb625f9SLionel Debieve		STM32MP_USE_EXTERNAL_HEAP \
187bdec516eSSebastien Pasdeloup		STM32MP13 \
188bdec516eSSebastien Pasdeloup		STM32MP15 \
189327131c4SLeonardo Sandoval)))
19046554b64SNicolas Le Bayon
1912eaffd51SYann Gautier# Include paths and source files
192c9d75b3cSYann GautierPLAT_INCLUDES		+=	-Iplat/st/stm32mp1/include/
1934353bb20SYann Gautier
194a430382fSYann GautierPLAT_BL_COMMON_SOURCES	+=	plat/st/stm32mp1/stm32mp1_private.c
1954353bb20SYann Gautier
196985ee0b7SJulius WernerPLAT_BL_COMMON_SOURCES	+=	drivers/st/uart/aarch32/stm32_console.S
1974353bb20SYann Gautier
1984353bb20SYann Gautierifneq (${ENABLE_STACK_PROTECTOR},0)
1994353bb20SYann GautierPLAT_BL_COMMON_SOURCES	+=	plat/st/stm32mp1/stm32mp1_stack_protector.c
2004353bb20SYann Gautierendif
2014353bb20SYann Gautier
2024353bb20SYann GautierPLAT_BL_COMMON_SOURCES	+=	lib/cpus/aarch32/cortex_a7.S
2034353bb20SYann Gautier
204d304158eSYann GautierPLAT_BL_COMMON_SOURCES	+=	drivers/arm/tzc/tzc400.c				\
205072d7532SNicolas Le Bayon				drivers/st/bsec/bsec2.c					\
20610a511ceSYann Gautier				drivers/st/ddr/stm32mp1_ddr_helpers.c			\
207435832abSYann Gautier				drivers/st/i2c/stm32_i2c.c				\
20873680c23SYann Gautier				drivers/st/iwdg/stm32_iwdg.c				\
20923684d0eSYann Gautier				drivers/st/pmic/stm32mp_pmic.c				\
21023684d0eSYann Gautier				drivers/st/pmic/stpmic1.c				\
2117839a050SYann Gautier				drivers/st/reset/stm32mp1_reset.c			\
21273680c23SYann Gautier				plat/st/stm32mp1/stm32mp1_dbgmcu.c			\
21310a511ceSYann Gautier				plat/st/stm32mp1/stm32mp1_helper.S			\
214f33b2433SYann Gautier				plat/st/stm32mp1/stm32mp1_syscfg.c
2154353bb20SYann Gautier
2169be88e75SGabriel Fernandezifeq ($(STM32MP13),1)
2179be88e75SGabriel FernandezPLAT_BL_COMMON_SOURCES	+=	drivers/st/clk/clk-stm32-core.c				\
21827423744SNicolas Le Bayon				drivers/st/clk/clk-stm32mp13.c				\
21927423744SNicolas Le Bayon				drivers/st/crypto/stm32_rng.c
2209be88e75SGabriel Fernandezelse
2219be88e75SGabriel FernandezPLAT_BL_COMMON_SOURCES	+=	drivers/st/clk/stm32mp1_clk.c
2229be88e75SGabriel Fernandezendif
2239be88e75SGabriel Fernandez
224a430382fSYann GautierBL2_SOURCES		+=	plat/st/stm32mp1/plat_bl2_mem_params_desc.c		\
2254584e01dSLionel Debieve				plat/st/stm32mp1/stm32mp1_fconf_firewall.c
2261d204ee4SYann Gautier
227a430382fSYann GautierBL2_SOURCES		+=	drivers/st/crypto/stm32_hash.c				\
2284353bb20SYann Gautier				plat/st/stm32mp1/bl2_plat_setup.c
2294353bb20SYann Gautier
230*c7a457abSNicolas Le Bayonifeq ($(STM32MP13),1)
231*c7a457abSNicolas Le BayonBL2_SOURCES		+=	drivers/st/mce/stm32_mce.c
232*c7a457abSNicolas Le Bayonendif
233*c7a457abSNicolas Le Bayon
234beb625f9SLionel Debieveifeq (${TRUSTED_BOARD_BOOT},1)
235beb625f9SLionel Debieveifeq ($(STM32MP13),1)
236a430382fSYann GautierBL2_SOURCES		+=	drivers/st/crypto/stm32_pka.c
237a430382fSYann GautierBL2_SOURCES		+=	drivers/st/crypto/stm32_saes.c
238beb625f9SLionel Debieveendif
239beb625f9SLionel Debieveendif
240beb625f9SLionel Debieve
24146554b64SNicolas Le Bayonifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),)
242a430382fSYann GautierBL2_SOURCES		+=	drivers/st/mmc/stm32_sdmmc2.c
24346554b64SNicolas Le Bayonendif
244aec7de41SYann Gautier
24512e21dfdSLionel Debieveifeq (${STM32MP_RAW_NAND},1)
246a430382fSYann GautierBL2_SOURCES		+=	drivers/st/fmc/stm32_fmc2_nand.c
247b1b218fbSLionel Debieveendif
248b1b218fbSLionel Debieve
249b1b218fbSLionel Debieveifneq ($(filter 1,${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),)
250a430382fSYann GautierBL2_SOURCES		+=	drivers/st/spi/stm32_qspi.c
251b1b218fbSLionel Debieveendif
252b1b218fbSLionel Debieve
253b1b218fbSLionel Debieveifneq ($(filter 1,${STM32MP_RAW_NAND} ${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),)
254b1b218fbSLionel DebieveBL2_SOURCES		+=	plat/st/stm32mp1/stm32mp1_boot_device.c
25512e21dfdSLionel Debieveendif
25612e21dfdSLionel Debieve
2579083fa11SPatrick Delaunayifeq (${STM32MP_UART_PROGRAMMER},1)
258a430382fSYann GautierBL2_SOURCES		+=	drivers/st/uart/stm32_uart.c
2599083fa11SPatrick Delaunayendif
2609083fa11SPatrick Delaunay
261fa92fef0SPatrick Delaunayifeq (${STM32MP_USB_PROGRAMMER},1)
262fa92fef0SPatrick Delaunay#The DFU stack uses only one end point, reduce the USB stack footprint
263fa92fef0SPatrick Delaunay$(eval $(call add_define_val,CONFIG_USBD_EP_NB,1U))
2649083fa11SPatrick DelaunayBL2_SOURCES		+=	drivers/st/usb/stm32mp1_usb.c				\
265fa92fef0SPatrick Delaunay				plat/st/stm32mp1/stm32mp1_usb_dfu.c
266fa92fef0SPatrick Delaunayendif
267fa92fef0SPatrick Delaunay
268a430382fSYann GautierBL2_SOURCES		+=	drivers/st/ddr/stm32mp1_ddr.c				\
26910a511ceSYann Gautier				drivers/st/ddr/stm32mp1_ram.c
27010a511ceSYann Gautier
27147e62314SPatrick DelaunayBL2_SOURCES		+=	plat/st/stm32mp1/plat_ddr.c
27247e62314SPatrick Delaunay
2731d204ee4SYann Gautierifeq ($(AARCH32_SP),sp_min)
2741d204ee4SYann Gautier# Create DTB file for BL32
275f4dd18c2SChris Kay${BUILD_PLAT}/fdts/%-bl32.dts: fdts/%.dts fdts/${BL32_DTSI} | $$(@D)/
27671ba1647SYann Gautier	$(q)echo '#include "$(patsubst %.dts,%$(SP_EXT).dts,$(patsubst fdts/%,%,$<))"' > $@
2777c4e1eeaSChris Kay	$(q)echo '#include "${BL32_DTSI}"' >> $@
2781d204ee4SYann Gautier
279f4dd18c2SChris Kay${BUILD_PLAT}/fdts/%-bl32.dtb: ${BUILD_PLAT}/fdts/%-bl32.dts | $$(@D)/
2801d204ee4SYann Gautierendif
2811d204ee4SYann Gautier
282a430382fSYann Gautierinclude plat/st/common/common_rules.mk
283