1 /* 2 * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <platform_def.h> 8 9 #include <common/bl_common.h> 10 #include <common/desc_image_load.h> 11 #include <plat/common/platform.h> 12 13 /******************************************************************************* 14 * Following descriptor provides BL image/ep information that gets used 15 * by BL2 to load the images and also subset of this information is 16 * passed to next BL image. The image loading sequence is managed by 17 * populating the images in required loading order. The image execution 18 * sequence is managed by populating the `next_handoff_image_id` with 19 * the next executable image id. 20 ******************************************************************************/ 21 static bl_mem_params_node_t bl2_mem_params_descs[] = { 22 /* Fill BL32 related information */ 23 { 24 .image_id = BL32_IMAGE_ID, 25 26 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, 27 VERSION_2, entry_point_info_t, 28 SECURE | EXECUTABLE | EP_FIRST_EXE), 29 30 .ep_info.pc = BL32_BASE, 31 .ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, 32 SPSR_E_LITTLE, 33 DISABLE_ALL_EXCEPTIONS), 34 35 SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, 36 VERSION_2, image_info_t, 37 IMAGE_ATTRIB_PLAT_SETUP), 38 39 .image_info.image_base = BL32_BASE, 40 .image_info.image_max_size = BL32_LIMIT - BL32_BASE, 41 42 .next_handoff_image_id = BL33_IMAGE_ID, 43 }, 44 45 /* Fill BL33 related information */ 46 { 47 .image_id = BL33_IMAGE_ID, 48 49 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, 50 VERSION_2, entry_point_info_t, 51 NON_SECURE | EXECUTABLE), 52 53 .ep_info.pc = PLAT_STM32MP1_NS_IMAGE_OFFSET, 54 .ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, 55 SPSR_E_LITTLE, 56 DISABLE_ALL_EXCEPTIONS), 57 58 SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, 59 VERSION_2, image_info_t, 0), 60 61 .image_info.image_base = PLAT_STM32MP1_NS_IMAGE_OFFSET, 62 .image_info.image_max_size = STM32MP1_DDR_MAX_SIZE - 63 (PLAT_STM32MP1_NS_IMAGE_OFFSET - STM32MP1_DDR_BASE), 64 65 .next_handoff_image_id = INVALID_IMAGE_ID, 66 } 67 }; 68 69 REGISTER_BL_IMAGE_DESCS(bl2_mem_params_descs) 70