1*4353bb20SYann Gautier /* 2*4353bb20SYann Gautier * Copyright (c) 2017, STMicroelectronics - All Rights Reserved 3*4353bb20SYann Gautier * 4*4353bb20SYann Gautier * SPDX-License-Identifier: BSD-3-Clause 5*4353bb20SYann Gautier */ 6*4353bb20SYann Gautier 7*4353bb20SYann Gautier #ifndef __BOOT_API_H 8*4353bb20SYann Gautier #define __BOOT_API_H 9*4353bb20SYann Gautier 10*4353bb20SYann Gautier #include <stdint.h> 11*4353bb20SYann Gautier 12*4353bb20SYann Gautier /* 13*4353bb20SYann Gautier * Possible value of boot context field 'boot_interface_sel' 14*4353bb20SYann Gautier */ 15*4353bb20SYann Gautier 16*4353bb20SYann Gautier /* Value of field 'boot_interface_sel' when no boot occurred */ 17*4353bb20SYann Gautier #define BOOT_API_CTX_BOOT_INTERFACE_SEL_NO 0x0U 18*4353bb20SYann Gautier 19*4353bb20SYann Gautier /* Boot occurred on SD */ 20*4353bb20SYann Gautier #define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD 0x1U 21*4353bb20SYann Gautier 22*4353bb20SYann Gautier /* Boot occurred on EMMC */ 23*4353bb20SYann Gautier #define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC 0x2U 24*4353bb20SYann Gautier 25*4353bb20SYann Gautier /** 26*4353bb20SYann Gautier * @brief Possible value of boot context field 'EmmcXferStatus' 27*4353bb20SYann Gautier */ 28*4353bb20SYann Gautier /* 29*4353bb20SYann Gautier * Possible value of boot context field 'emmc_xfer_status' 30*4353bb20SYann Gautier */ 31*4353bb20SYann Gautier #define BOOT_API_CTX_EMMC_XFER_STATUS_NOT_STARTED 0x0U 32*4353bb20SYann Gautier #define BOOT_API_CTX_EMMC_XFER_STATUS_DATAEND_DETECTED 0x1U 33*4353bb20SYann Gautier #define BOOT_API_CTX_EMMC_XFER_STATUS_XFER_OVERALL_TIMEOUT_DETECTED 0x2U 34*4353bb20SYann Gautier #define BOOT_API_CTX_EMMC_XFER_STATUS_XFER_DATA_TIMEOUT 0x3U 35*4353bb20SYann Gautier 36*4353bb20SYann Gautier /* 37*4353bb20SYann Gautier * Possible value of boot context field 'emmc_error_status' 38*4353bb20SYann Gautier */ 39*4353bb20SYann Gautier #define BOOT_API_CTX_EMMC_ERROR_STATUS_NONE 0x0U 40*4353bb20SYann Gautier #define BOOT_API_CTX_EMMC_ERROR_STATUS_CMD_TIMEOUT 0x1U 41*4353bb20SYann Gautier #define BOOT_API_CTX_EMMC_ERROR_STATUS_ACK_TIMEOUT 0x2U 42*4353bb20SYann Gautier #define BOOT_API_CTX_EMMC_ERROR_STATUS_DATA_CRC_FAIL 0x3U 43*4353bb20SYann Gautier #define BOOT_API_CTX_EMMC_ERROR_STATUS_NOT_ENOUGH_BOOT_DATA_RX 0x4U 44*4353bb20SYann Gautier #define BOOT_API_CTX_EMMC_ERROR_STATUS_HEADER_NOT_FOUND 0x5U 45*4353bb20SYann Gautier #define BOOT_API_CTX_EMMC_ERROR_STATUS_HEADER_SIZE_ZERO 0x6U 46*4353bb20SYann Gautier #define BOOT_API_CTX_EMMC_ERROR_STATUS_IMAGE_NOT_COMPLETE 0x7U 47*4353bb20SYann Gautier 48*4353bb20SYann Gautier /* Image Header related definitions */ 49*4353bb20SYann Gautier 50*4353bb20SYann Gautier /* Definition of header version */ 51*4353bb20SYann Gautier #define BOOT_API_HEADER_VERSION 0x00010000U 52*4353bb20SYann Gautier 53*4353bb20SYann Gautier /* 54*4353bb20SYann Gautier * Magic number used to detect header in memory 55*4353bb20SYann Gautier * Its value must be 'S' 'T' 'M' 0x32, i.e 0x324D5453 as field 56*4353bb20SYann Gautier * 'bootapi_image_header_t.magic' 57*4353bb20SYann Gautier * This identifies the start of a boot image. 58*4353bb20SYann Gautier */ 59*4353bb20SYann Gautier #define BOOT_API_IMAGE_HEADER_MAGIC_NB 0x324D5453U 60*4353bb20SYann Gautier 61*4353bb20SYann Gautier /* Definitions related to Authentication used in image header structure */ 62*4353bb20SYann Gautier #define BOOT_API_ECDSA_PUB_KEY_LEN_IN_BYTES 64 63*4353bb20SYann Gautier #define BOOT_API_ECDSA_SIGNATURE_LEN_IN_BYTES 64 64*4353bb20SYann Gautier #define BOOT_API_SHA256_DIGEST_SIZE_IN_BYTES 32 65*4353bb20SYann Gautier 66*4353bb20SYann Gautier /* Possible values of the field 'boot_api_image_header_t.ecc_algo_type' */ 67*4353bb20SYann Gautier #define BOOT_API_ECDSA_ALGO_TYPE_P256NIST 1 68*4353bb20SYann Gautier #define BOOT_API_ECDSA_ALGO_TYPE_BRAINPOOL256 2 69*4353bb20SYann Gautier 70*4353bb20SYann Gautier /* 71*4353bb20SYann Gautier * Cores secure magic numbers 72*4353bb20SYann Gautier * Constant to be stored in bakcup register 73*4353bb20SYann Gautier * BOOT_API_MAGIC_NUMBER_TAMP_BCK_REG_IDX 74*4353bb20SYann Gautier */ 75*4353bb20SYann Gautier #define BOOT_API_A7_CORE0_MAGIC_NUMBER 0xCA7FACE0U 76*4353bb20SYann Gautier #define BOOT_API_A7_CORE1_MAGIC_NUMBER 0xCA7FACE1U 77*4353bb20SYann Gautier 78*4353bb20SYann Gautier /* 79*4353bb20SYann Gautier * TAMP_BCK4R register index 80*4353bb20SYann Gautier * This register is used to write a Magic Number in order to restart 81*4353bb20SYann Gautier * Cortex A7 Core 1 and make it execute @ branch address from TAMP_BCK5R 82*4353bb20SYann Gautier */ 83*4353bb20SYann Gautier #define BOOT_API_CORE1_MAGIC_NUMBER_TAMP_BCK_REG_IDX 4U 84*4353bb20SYann Gautier 85*4353bb20SYann Gautier /* 86*4353bb20SYann Gautier * TAMP_BCK5R register index 87*4353bb20SYann Gautier * This register is used to contain the branch address of 88*4353bb20SYann Gautier * Cortex A7 Core 1 when restarted by a TAMP_BCK4R magic number writing 89*4353bb20SYann Gautier */ 90*4353bb20SYann Gautier #define BOOT_API_CORE1_BRANCH_ADDRESS_TAMP_BCK_REG_IDX 5U 91*4353bb20SYann Gautier 92*4353bb20SYann Gautier /* 93*4353bb20SYann Gautier * Possible value of boot context field 'hse_clock_value_in_hz' 94*4353bb20SYann Gautier */ 95*4353bb20SYann Gautier #define BOOT_API_CTX_HSE_CLOCK_VALUE_UNDEFINED 0U 96*4353bb20SYann Gautier #define BOOT_API_CTX_HSE_CLOCK_VALUE_24_MHZ 24000000U 97*4353bb20SYann Gautier #define BOOT_API_CTX_HSE_CLOCK_VALUE_25_MHZ 25000000U 98*4353bb20SYann Gautier #define BOOT_API_CTX_HSE_CLOCK_VALUE_26_MHZ 26000000U 99*4353bb20SYann Gautier 100*4353bb20SYann Gautier /* 101*4353bb20SYann Gautier * Possible value of boot context field 'boot_partition_used_toboot' 102*4353bb20SYann Gautier */ 103*4353bb20SYann Gautier #define BOOT_API_CTX_BOOT_PARTITION_UNDEFINED 0U 104*4353bb20SYann Gautier 105*4353bb20SYann Gautier /* Used FSBL1 to boot */ 106*4353bb20SYann Gautier #define BOOT_API_CTX_BOOT_PARTITION_FSBL1 1U 107*4353bb20SYann Gautier 108*4353bb20SYann Gautier /* Used FSBL2 to boot */ 109*4353bb20SYann Gautier #define BOOT_API_CTX_BOOT_PARTITION_FSBL2 2U 110*4353bb20SYann Gautier 111*4353bb20SYann Gautier /* OTP_CFG0 */ 112*4353bb20SYann Gautier #define BOOT_API_OTP_MODE_WORD_NB 0 113*4353bb20SYann Gautier /* Closed = OTP_CFG0[6] */ 114*4353bb20SYann Gautier #define BOOT_API_OTP_MODE_CLOSED_BIT_POS 6 115*4353bb20SYann Gautier 116*4353bb20SYann Gautier /* 117*4353bb20SYann Gautier * Boot Context related definitions 118*4353bb20SYann Gautier */ 119*4353bb20SYann Gautier 120*4353bb20SYann Gautier /* 121*4353bb20SYann Gautier * Boot core boot configuration structure 122*4353bb20SYann Gautier * Specifies all items of the cold boot configuration 123*4353bb20SYann Gautier * Memory and peripheral part. 124*4353bb20SYann Gautier */ 125*4353bb20SYann Gautier typedef struct { 126*4353bb20SYann Gautier /* 127*4353bb20SYann Gautier * Boot interface used to boot : take values from defines 128*4353bb20SYann Gautier * BOOT_API_CTX_BOOT_INTERFACE_SEL_XXX above 129*4353bb20SYann Gautier */ 130*4353bb20SYann Gautier uint16_t boot_interface_selected; 131*4353bb20SYann Gautier uint16_t boot_interface_instance; 132*4353bb20SYann Gautier uint32_t reserved1[13]; 133*4353bb20SYann Gautier uint32_t otp_afmux_values[3]; 134*4353bb20SYann Gautier uint32_t reserved[9]; 135*4353bb20SYann Gautier /* 136*4353bb20SYann Gautier * Information specific to an SD boot 137*4353bb20SYann Gautier * Updated each time an SD boot is at least attempted, 138*4353bb20SYann Gautier * even if not successful 139*4353bb20SYann Gautier * Note : This is useful to understand why an SD boot failed 140*4353bb20SYann Gautier * in particular 141*4353bb20SYann Gautier */ 142*4353bb20SYann Gautier uint32_t sd_err_internal_timeout_cnt; 143*4353bb20SYann Gautier uint32_t sd_err_dcrc_fail_cnt; 144*4353bb20SYann Gautier uint32_t sd_err_dtimeout_cnt; 145*4353bb20SYann Gautier uint32_t sd_err_ctimeout_cnt; 146*4353bb20SYann Gautier uint32_t sd_err_ccrc_fail_cnt; 147*4353bb20SYann Gautier uint32_t sd_overall_retry_cnt; 148*4353bb20SYann Gautier /* 149*4353bb20SYann Gautier * Information specific to an eMMC boot 150*4353bb20SYann Gautier * Updated each time an eMMC boot is at least attempted, 151*4353bb20SYann Gautier * even if not successful 152*4353bb20SYann Gautier * Note : This is useful to understand why an eMMC boot failed 153*4353bb20SYann Gautier * in particular 154*4353bb20SYann Gautier */ 155*4353bb20SYann Gautier uint32_t emmc_xfer_status; 156*4353bb20SYann Gautier uint32_t emmc_error_status; 157*4353bb20SYann Gautier uint32_t emmc_nbbytes_rxcopied_tosysram_download_area; 158*4353bb20SYann Gautier uint32_t hse_clock_value_in_hz; 159*4353bb20SYann Gautier /* 160*4353bb20SYann Gautier * Boot partition : 161*4353bb20SYann Gautier * ie FSBL partition on which the boot was successful 162*4353bb20SYann Gautier */ 163*4353bb20SYann Gautier uint32_t boot_partition_used_toboot; 164*4353bb20SYann Gautier 165*4353bb20SYann Gautier } __packed boot_api_context_t; 166*4353bb20SYann Gautier 167*4353bb20SYann Gautier /* 168*4353bb20SYann Gautier * Image Header related definitions 169*4353bb20SYann Gautier */ 170*4353bb20SYann Gautier 171*4353bb20SYann Gautier /* 172*4353bb20SYann Gautier * Structure used to define the common Header format used for FSBL, xloader, 173*4353bb20SYann Gautier * ... and in particular used by bootROM for FSBL header readout. 174*4353bb20SYann Gautier * FSBL header size is 256 Bytes = 0x100 175*4353bb20SYann Gautier */ 176*4353bb20SYann Gautier typedef struct { 177*4353bb20SYann Gautier /* BOOT_API_IMAGE_HEADER_MAGIC_NB */ 178*4353bb20SYann Gautier uint32_t magic; 179*4353bb20SYann Gautier uint8_t image_signature[BOOT_API_ECDSA_SIGNATURE_LEN_IN_BYTES]; 180*4353bb20SYann Gautier /* 181*4353bb20SYann Gautier * Checksum of payload 182*4353bb20SYann Gautier * 32-bit sum all all payload bytes considered as 8 bit unigned numbers, 183*4353bb20SYann Gautier * discarding any overflow bits. 184*4353bb20SYann Gautier * Use to check UART/USB downloaded image integrity when signature 185*4353bb20SYann Gautier * is not used (i.e bit 0 : 'No_sig_check' = 1 in option flags) 186*4353bb20SYann Gautier */ 187*4353bb20SYann Gautier uint32_t payload_checksum; 188*4353bb20SYann Gautier /* Image header version : should have value BOOT_API_HEADER_VERSION */ 189*4353bb20SYann Gautier uint32_t header_version; 190*4353bb20SYann Gautier /* Image length in bytes */ 191*4353bb20SYann Gautier uint32_t image_length; 192*4353bb20SYann Gautier /* 193*4353bb20SYann Gautier * Image Entry point address : should be in the SYSRAM area 194*4353bb20SYann Gautier * and at least within the download area range 195*4353bb20SYann Gautier */ 196*4353bb20SYann Gautier uint32_t image_entry_point; 197*4353bb20SYann Gautier /* Reserved */ 198*4353bb20SYann Gautier uint32_t reserved1; 199*4353bb20SYann Gautier /* 200*4353bb20SYann Gautier * Image load address : not used by bootROM but to be consistent 201*4353bb20SYann Gautier * with header format for other packages (xloader, ...) 202*4353bb20SYann Gautier */ 203*4353bb20SYann Gautier uint32_t load_address; 204*4353bb20SYann Gautier /* Reserved */ 205*4353bb20SYann Gautier uint32_t reserved2; 206*4353bb20SYann Gautier /* Image version to be compared by bootROM with monotonic 207*4353bb20SYann Gautier * counter value in OTP_CFG4 prior executing the downloaded image 208*4353bb20SYann Gautier */ 209*4353bb20SYann Gautier uint32_t image_version; 210*4353bb20SYann Gautier /* 211*4353bb20SYann Gautier * Option flags: 212*4353bb20SYann Gautier * Bit 0 : No signature check request : 'No_sig_check' 213*4353bb20SYann Gautier * value 1 : for No signature check request 214*4353bb20SYann Gautier * value 0 : No request to bypass the signature check 215*4353bb20SYann Gautier * Note : No signature check is never allowed on a Secured chip 216*4353bb20SYann Gautier */ 217*4353bb20SYann Gautier uint32_t option_flags; 218*4353bb20SYann Gautier /* 219*4353bb20SYann Gautier * Type of ECC algorithm to use : 220*4353bb20SYann Gautier * value 1 : for P-256 NIST algorithm 221*4353bb20SYann Gautier * value 2 : for Brainpool 256 algorithm 222*4353bb20SYann Gautier * See definitions 'BOOT_API_ECDSA_ALGO_TYPE_XXX' above. 223*4353bb20SYann Gautier */ 224*4353bb20SYann Gautier uint32_t ecc_algo_type; 225*4353bb20SYann Gautier /* 226*4353bb20SYann Gautier * OEM ECC Public Key (aka Root pubk) provided in header on 512 bits. 227*4353bb20SYann Gautier * The SHA-256 hash of the OEM ECC pubk must match the one stored 228*4353bb20SYann Gautier * in OTP cells. 229*4353bb20SYann Gautier */ 230*4353bb20SYann Gautier uint8_t ecc_pubk[BOOT_API_ECDSA_PUB_KEY_LEN_IN_BYTES]; 231*4353bb20SYann Gautier /* Pad up to 256 byte total size */ 232*4353bb20SYann Gautier uint8_t pad[84]; 233*4353bb20SYann Gautier } __packed boot_api_image_header_t; 234*4353bb20SYann Gautier 235*4353bb20SYann Gautier #endif /* __BOOT_API_H */ 236