1 /* 2 * Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <common/bl_common.h> 8 #include <common/debug.h> 9 #include <common/fdt_wrappers.h> 10 #include <drivers/arm/gicv2.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <lib/utils.h> 13 #include <libfdt.h> 14 #include <plat/common/platform.h> 15 16 #include <platform_def.h> 17 18 struct stm32mp_gic_instance { 19 uint32_t cells; 20 uint32_t phandle_node; 21 }; 22 23 /****************************************************************************** 24 * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0 25 * interrupts. 26 *****************************************************************************/ 27 static const interrupt_prop_t stm32mp_interrupt_props[] = { 28 PLATFORM_G1S_PROPS(GICV2_INTR_GROUP0), 29 PLATFORM_G0_PROPS(GICV2_INTR_GROUP0) 30 }; 31 32 /* Fix target_mask_array as secondary core is not able to initialize it */ 33 static unsigned int target_mask_array[PLATFORM_CORE_COUNT] = {1, 2}; 34 35 static gicv2_driver_data_t platform_gic_data = { 36 .interrupt_props = stm32mp_interrupt_props, 37 .interrupt_props_num = ARRAY_SIZE(stm32mp_interrupt_props), 38 .target_masks = target_mask_array, 39 .target_masks_num = ARRAY_SIZE(target_mask_array), 40 }; 41 42 static struct stm32mp_gic_instance stm32mp_gic; 43 44 void stm32mp_gic_init(void) 45 { 46 int node; 47 void *fdt; 48 const fdt32_t *cuint; 49 uintptr_t addr; 50 int err; 51 52 if (fdt_get_address(&fdt) == 0) { 53 panic(); 54 } 55 56 node = fdt_node_offset_by_compatible(fdt, -1, "arm,cortex-a7-gic"); 57 if (node < 0) { 58 panic(); 59 } 60 61 err = fdt_get_reg_props_by_index(fdt, node, 0, &addr, NULL); 62 if (err < 0) { 63 panic(); 64 } 65 platform_gic_data.gicd_base = addr; 66 67 err = fdt_get_reg_props_by_index(fdt, node, 1, &addr, NULL); 68 if (err < 0) { 69 panic(); 70 } 71 platform_gic_data.gicc_base = addr; 72 73 cuint = fdt_getprop(fdt, node, "#interrupt-cells", NULL); 74 if (cuint == NULL) { 75 panic(); 76 } 77 78 stm32mp_gic.cells = fdt32_to_cpu(*cuint); 79 80 stm32mp_gic.phandle_node = fdt_get_phandle(fdt, node); 81 if (stm32mp_gic.phandle_node == 0U) { 82 panic(); 83 } 84 85 gicv2_driver_init(&platform_gic_data); 86 gicv2_distif_init(); 87 88 stm32mp_gic_pcpu_init(); 89 } 90 91 void stm32mp_gic_pcpu_init(void) 92 { 93 gicv2_pcpu_distif_init(); 94 gicv2_set_pe_target_mask(plat_my_core_pos()); 95 gicv2_cpuif_enable(); 96 } 97