1 /* 2 * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 10 #include <platform_def.h> 11 12 #include <arch_helpers.h> 13 #include <common/debug.h> 14 #include <drivers/st/stm32mp_clkfunc.h> 15 #include <lib/xlat_tables/xlat_tables_v2.h> 16 #include <plat/common/platform.h> 17 18 uintptr_t plat_get_ns_image_entrypoint(void) 19 { 20 return BL33_BASE; 21 } 22 23 unsigned int plat_get_syscnt_freq2(void) 24 { 25 return read_cntfrq_el0(); 26 } 27 28 static uintptr_t boot_ctx_address; 29 30 void stm32mp_save_boot_ctx_address(uintptr_t address) 31 { 32 boot_ctx_address = address; 33 } 34 35 uintptr_t stm32mp_get_boot_ctx_address(void) 36 { 37 return boot_ctx_address; 38 } 39 40 uintptr_t stm32mp_ddrctrl_base(void) 41 { 42 static uintptr_t ddrctrl_base; 43 44 if (ddrctrl_base == 0) { 45 ddrctrl_base = dt_get_ddrctrl_base(); 46 47 assert(ddrctrl_base == DDRCTRL_BASE); 48 } 49 50 return ddrctrl_base; 51 } 52 53 uintptr_t stm32mp_ddrphyc_base(void) 54 { 55 static uintptr_t ddrphyc_base; 56 57 if (ddrphyc_base == 0) { 58 ddrphyc_base = dt_get_ddrphyc_base(); 59 60 assert(ddrphyc_base == DDRPHYC_BASE); 61 } 62 63 return ddrphyc_base; 64 } 65 66 uintptr_t stm32mp_pwr_base(void) 67 { 68 static uintptr_t pwr_base; 69 70 if (pwr_base == 0) { 71 pwr_base = dt_get_pwr_base(); 72 73 assert(pwr_base == PWR_BASE); 74 } 75 76 return pwr_base; 77 } 78 79 uintptr_t stm32mp_rcc_base(void) 80 { 81 static uintptr_t rcc_base; 82 83 if (rcc_base == 0) { 84 rcc_base = fdt_rcc_read_addr(); 85 86 assert(rcc_base == RCC_BASE); 87 } 88 89 return rcc_base; 90 } 91 92 bool stm32mp_lock_available(void) 93 { 94 const uint32_t c_m_bits = SCTLR_M_BIT | SCTLR_C_BIT; 95 96 /* The spinlocks are used only when MMU and data cache are enabled */ 97 return (read_sctlr() & c_m_bits) == c_m_bits; 98 } 99 100 int stm32mp_check_header(boot_api_image_header_t *header, uintptr_t buffer) 101 { 102 uint32_t i; 103 uint32_t img_checksum = 0U; 104 105 /* 106 * Check header/payload validity: 107 * - Header magic 108 * - Header version 109 * - Payload checksum 110 */ 111 if (header->magic != BOOT_API_IMAGE_HEADER_MAGIC_NB) { 112 ERROR("Header magic\n"); 113 return -EINVAL; 114 } 115 116 if (header->header_version != BOOT_API_HEADER_VERSION) { 117 ERROR("Header version\n"); 118 return -EINVAL; 119 } 120 121 for (i = 0U; i < header->image_length; i++) { 122 img_checksum += *(uint8_t *)(buffer + i); 123 } 124 125 if (header->payload_checksum != img_checksum) { 126 ERROR("Checksum: 0x%x (awaited: 0x%x)\n", img_checksum, 127 header->payload_checksum); 128 return -EINVAL; 129 } 130 131 return 0; 132 } 133 134 int stm32mp_map_ddr_non_cacheable(void) 135 { 136 return mmap_add_dynamic_region(STM32MP_DDR_BASE, STM32MP_DDR_BASE, 137 STM32MP_DDR_MAX_SIZE, 138 MT_NON_CACHEABLE | MT_RW | MT_NS); 139 } 140 141 int stm32mp_unmap_ddr(void) 142 { 143 return mmap_remove_dynamic_region(STM32MP_DDR_BASE, 144 STM32MP_DDR_MAX_SIZE); 145 } 146