147cf5d3fSEtienne Carriere /* 247cf5d3fSEtienne Carriere * Copyright (c) 2017-2020, STMicroelectronics - All Rights Reserved 347cf5d3fSEtienne Carriere * 447cf5d3fSEtienne Carriere * SPDX-License-Identifier: BSD-3-Clause 547cf5d3fSEtienne Carriere */ 647cf5d3fSEtienne Carriere 747cf5d3fSEtienne Carriere #ifndef STM32MP_SHARED_RESOURCES_H 847cf5d3fSEtienne Carriere #define STM32MP_SHARED_RESOURCES_H 947cf5d3fSEtienne Carriere 1047cf5d3fSEtienne Carriere #include <stdbool.h> 1147cf5d3fSEtienne Carriere 12*68450c94SEtienne Carriere #ifdef STM32MP_SHARED_RESOURCES 13*68450c94SEtienne Carriere enum stm32mp_shres; 14*68450c94SEtienne Carriere 1547cf5d3fSEtienne Carriere /* Return true if @clock_id is shared by secure and non-secure worlds */ 1647cf5d3fSEtienne Carriere bool stm32mp_nsec_can_access_clock(unsigned long clock_id); 1747cf5d3fSEtienne Carriere 1847cf5d3fSEtienne Carriere /* Return true if and only if @reset_id relates to a non-secure peripheral */ 1947cf5d3fSEtienne Carriere bool stm32mp_nsec_can_access_reset(unsigned int reset_id); 2047cf5d3fSEtienne Carriere 21*68450c94SEtienne Carriere /* Register a shared resource assigned to the secure world */ 22*68450c94SEtienne Carriere void stm32mp_register_secure_periph(enum stm32mp_shres id); 23*68450c94SEtienne Carriere 24*68450c94SEtienne Carriere /* Register a shared resource assigned to the non-secure world */ 25*68450c94SEtienne Carriere void stm32mp_register_non_secure_periph(enum stm32mp_shres id); 26*68450c94SEtienne Carriere 275f038ac6SEtienne Carriere /* Consolidate peripheral states and lock against new peripheral registering */ 285f038ac6SEtienne Carriere void stm32mp_lock_periph_registering(void); 29*68450c94SEtienne Carriere #endif /* STM32MP_SHARED_RESOURCES */ 3047cf5d3fSEtienne Carriere #endif /* STM32MP_SHARED_RESOURCES_H */ 31