1 /* 2 * Copyright (C) 2018-2019, STMicroelectronics - All Rights Reserved 3 * Copyright (c) 2018-2019, Linaro Limited 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef STM32MP_COMMON_H 9 #define STM32MP_COMMON_H 10 11 #include <stdbool.h> 12 13 #include <platform_def.h> 14 15 #include <arch_helpers.h> 16 17 /* Functions to save and get boot context address given by ROM code */ 18 void stm32mp_save_boot_ctx_address(uintptr_t address); 19 uintptr_t stm32mp_get_boot_ctx_address(void); 20 21 bool stm32mp_is_single_core(void); 22 23 /* Return the base address of the DDR controller */ 24 uintptr_t stm32mp_ddrctrl_base(void); 25 26 /* Return the base address of the DDR PHY */ 27 uintptr_t stm32mp_ddrphyc_base(void); 28 29 /* Return the base address of the PWR peripheral */ 30 uintptr_t stm32mp_pwr_base(void); 31 32 /* Return the base address of the RCC peripheral */ 33 uintptr_t stm32mp_rcc_base(void); 34 35 /* Check MMU status to allow spinlock use */ 36 bool stm32mp_lock_available(void); 37 38 /* Get IWDG platform instance ID from peripheral IO memory base address */ 39 uint32_t stm32_iwdg_get_instance(uintptr_t base); 40 41 /* Return bitflag mask for expected IWDG configuration from OTP content */ 42 uint32_t stm32_iwdg_get_otp_config(uint32_t iwdg_inst); 43 44 #if defined(IMAGE_BL2) 45 /* Update OTP shadow registers with IWDG configuration from device tree */ 46 uint32_t stm32_iwdg_shadow_update(uint32_t iwdg_inst, uint32_t flags); 47 #endif 48 49 /* 50 * Platform util functions for the GPIO driver 51 * @bank: Target GPIO bank ID as per DT bindings 52 * 53 * Platform shall implement these functions to provide to stm32_gpio 54 * driver the resource reference for a target GPIO bank. That are 55 * memory mapped interface base address, interface offset (see below) 56 * and clock identifier. 57 * 58 * stm32_get_gpio_bank_offset() returns a bank offset that is used to 59 * check DT configuration matches platform implementation of the banks 60 * description. 61 */ 62 uintptr_t stm32_get_gpio_bank_base(unsigned int bank); 63 unsigned long stm32_get_gpio_bank_clock(unsigned int bank); 64 uint32_t stm32_get_gpio_bank_offset(unsigned int bank); 65 66 /* Print CPU information */ 67 void stm32mp_print_cpuinfo(void); 68 69 /* Print board information */ 70 void stm32mp_print_boardinfo(void); 71 72 /* 73 * Util for clock gating and to get clock rate for stm32 and platform drivers 74 * @id: Target clock ID, ID used in clock DT bindings 75 */ 76 bool stm32mp_clk_is_enabled(unsigned long id); 77 void stm32mp_clk_enable(unsigned long id); 78 void stm32mp_clk_disable(unsigned long id); 79 unsigned long stm32mp_clk_get_rate(unsigned long id); 80 81 /* Initialise the IO layer and register platform IO devices */ 82 void stm32mp_io_setup(void); 83 84 static inline uint64_t arm_cnt_us2cnt(uint32_t us) 85 { 86 return ((uint64_t)us * (uint64_t)read_cntfrq()) / 1000000ULL; 87 } 88 89 static inline uint64_t timeout_init_us(uint32_t us) 90 { 91 return read_cntpct_el0() + arm_cnt_us2cnt(us); 92 } 93 94 static inline bool timeout_elapsed(uint64_t expire) 95 { 96 return read_cntpct_el0() > expire; 97 } 98 99 /* 100 * Check that the STM32 header of a .stm32 binary image is valid 101 * @param header: pointer to the stm32 image header 102 * @param buffer: address of the binary image (payload) 103 * @return: 0 on success, negative value in case of error 104 */ 105 int stm32mp_check_header(boot_api_image_header_t *header, uintptr_t buffer); 106 107 #endif /* STM32MP_COMMON_H */ 108