1 /* 2 * Copyright (C) 2018-2021, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef STM32MP_COMMON_H 8 #define STM32MP_COMMON_H 9 10 #include <stdbool.h> 11 12 #include <platform_def.h> 13 14 #define JEDEC_ST_BKID U(0x0) 15 #define JEDEC_ST_MFID U(0x20) 16 17 /* Functions to save and get boot context address given by ROM code */ 18 void stm32mp_save_boot_ctx_address(uintptr_t address); 19 uintptr_t stm32mp_get_boot_ctx_address(void); 20 uint16_t stm32mp_get_boot_itf_selected(void); 21 22 bool stm32mp_is_single_core(void); 23 bool stm32mp_is_closed_device(void); 24 25 /* Return the base address of the DDR controller */ 26 uintptr_t stm32mp_ddrctrl_base(void); 27 28 /* Return the base address of the DDR PHY */ 29 uintptr_t stm32mp_ddrphyc_base(void); 30 31 /* Return the base address of the PWR peripheral */ 32 uintptr_t stm32mp_pwr_base(void); 33 34 /* Return the base address of the RCC peripheral */ 35 uintptr_t stm32mp_rcc_base(void); 36 37 /* Check MMU status to allow spinlock use */ 38 bool stm32mp_lock_available(void); 39 40 /* Get IWDG platform instance ID from peripheral IO memory base address */ 41 uint32_t stm32_iwdg_get_instance(uintptr_t base); 42 43 /* Return bitflag mask for expected IWDG configuration from OTP content */ 44 uint32_t stm32_iwdg_get_otp_config(uint32_t iwdg_inst); 45 46 #if defined(IMAGE_BL2) 47 /* Update OTP shadow registers with IWDG configuration from device tree */ 48 uint32_t stm32_iwdg_shadow_update(uint32_t iwdg_inst, uint32_t flags); 49 #endif 50 51 #if STM32MP_UART_PROGRAMMER || !defined(IMAGE_BL2) 52 /* Get the UART address from its instance number */ 53 uintptr_t get_uart_address(uint32_t instance_nb); 54 #endif 55 56 /* Setup the UART console */ 57 int stm32mp_uart_console_setup(void); 58 59 /* 60 * Platform util functions for the GPIO driver 61 * @bank: Target GPIO bank ID as per DT bindings 62 * 63 * Platform shall implement these functions to provide to stm32_gpio 64 * driver the resource reference for a target GPIO bank. That are 65 * memory mapped interface base address, interface offset (see below) 66 * and clock identifier. 67 * 68 * stm32_get_gpio_bank_offset() returns a bank offset that is used to 69 * check DT configuration matches platform implementation of the banks 70 * description. 71 */ 72 uintptr_t stm32_get_gpio_bank_base(unsigned int bank); 73 unsigned long stm32_get_gpio_bank_clock(unsigned int bank); 74 uint32_t stm32_get_gpio_bank_offset(unsigned int bank); 75 bool stm32_gpio_is_secure_at_reset(unsigned int bank); 76 77 /* Return node offset for target GPIO bank ID @bank or a FDT error code */ 78 int stm32_get_gpio_bank_pinctrl_node(void *fdt, unsigned int bank); 79 80 /* Get the chip revision */ 81 uint32_t stm32mp_get_chip_version(void); 82 /* Get the chip device ID */ 83 uint32_t stm32mp_get_chip_dev_id(void); 84 85 /* Get SOC name */ 86 #define STM32_SOC_NAME_SIZE 20 87 void stm32mp_get_soc_name(char name[STM32_SOC_NAME_SIZE]); 88 89 /* Print CPU information */ 90 void stm32mp_print_cpuinfo(void); 91 92 /* Print board information */ 93 void stm32mp_print_boardinfo(void); 94 95 /* Initialise the IO layer and register platform IO devices */ 96 void stm32mp_io_setup(void); 97 98 #if STM32MP_USE_STM32IMAGE 99 /* 100 * Check that the STM32 header of a .stm32 binary image is valid 101 * @param header: pointer to the stm32 image header 102 * @param buffer: address of the binary image (payload) 103 * @return: 0 on success, negative value in case of error 104 */ 105 int stm32mp_check_header(boot_api_image_header_t *header, uintptr_t buffer); 106 #endif /* STM32MP_USE_STM32IMAGE */ 107 108 /* Functions to map DDR in MMU with non-cacheable attribute, and unmap it */ 109 int stm32mp_map_ddr_non_cacheable(void); 110 int stm32mp_unmap_ddr(void); 111 112 /* Functions to save and get boot peripheral info */ 113 void stm32_save_boot_interface(uint32_t interface, uint32_t instance); 114 void stm32_get_boot_interface(uint32_t *interface, uint32_t *instance); 115 116 #endif /* STM32MP_COMMON_H */ 117