1 /* 2 * Copyright (C) 2018-2023, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef STM32MP_COMMON_H 8 #define STM32MP_COMMON_H 9 10 #include <stdbool.h> 11 12 #include <platform_def.h> 13 14 #define JEDEC_ST_BKID U(0x0) 15 #define JEDEC_ST_MFID U(0x20) 16 17 /* Functions to save and get boot context address given by ROM code */ 18 void stm32mp_save_boot_ctx_address(uintptr_t address); 19 uintptr_t stm32mp_get_boot_ctx_address(void); 20 uint16_t stm32mp_get_boot_itf_selected(void); 21 22 bool stm32mp_is_single_core(void); 23 bool stm32mp_is_closed_device(void); 24 bool stm32mp_is_auth_supported(void); 25 26 /* Return the base address of the DDR controller */ 27 uintptr_t stm32mp_ddrctrl_base(void); 28 29 /* Return the base address of the DDR PHY */ 30 uintptr_t stm32mp_ddrphyc_base(void); 31 32 /* Return the base address of the PWR peripheral */ 33 uintptr_t stm32mp_pwr_base(void); 34 35 /* Return the base address of the RCC peripheral */ 36 uintptr_t stm32mp_rcc_base(void); 37 38 void stm32mp_gic_pcpu_init(void); 39 void stm32mp_gic_init(void); 40 41 /* Check MMU status to allow spinlock use */ 42 bool stm32mp_lock_available(void); 43 44 int stm32_get_otp_index(const char *otp_name, uint32_t *otp_idx, 45 uint32_t *otp_len); 46 int stm32_get_otp_value(const char *otp_name, uint32_t *otp_val); 47 int stm32_get_otp_value_from_idx(const uint32_t otp_idx, uint32_t *otp_val); 48 49 /* Get IWDG platform instance ID from peripheral IO memory base address */ 50 uint32_t stm32_iwdg_get_instance(uintptr_t base); 51 52 /* Return bitflag mask for expected IWDG configuration from OTP content */ 53 uint32_t stm32_iwdg_get_otp_config(uint32_t iwdg_inst); 54 55 #if defined(IMAGE_BL2) 56 /* Update OTP shadow registers with IWDG configuration from device tree */ 57 uint32_t stm32_iwdg_shadow_update(uint32_t iwdg_inst, uint32_t flags); 58 #endif 59 60 #if STM32MP_UART_PROGRAMMER || !defined(IMAGE_BL2) 61 /* Get the UART address from its instance number */ 62 uintptr_t get_uart_address(uint32_t instance_nb); 63 #endif 64 65 /* Setup the UART console */ 66 int stm32mp_uart_console_setup(void); 67 68 #if STM32MP_EARLY_CONSOLE 69 void stm32mp_setup_early_console(void); 70 #else 71 static inline void stm32mp_setup_early_console(void) 72 { 73 } 74 #endif 75 76 /* 77 * Platform util functions for the GPIO driver 78 * @bank: Target GPIO bank ID as per DT bindings 79 * 80 * Platform shall implement these functions to provide to stm32_gpio 81 * driver the resource reference for a target GPIO bank. That are 82 * memory mapped interface base address, interface offset (see below) 83 * and clock identifier. 84 * 85 * stm32_get_gpio_bank_offset() returns a bank offset that is used to 86 * check DT configuration matches platform implementation of the banks 87 * description. 88 */ 89 uintptr_t stm32_get_gpio_bank_base(unsigned int bank); 90 unsigned long stm32_get_gpio_bank_clock(unsigned int bank); 91 uint32_t stm32_get_gpio_bank_offset(unsigned int bank); 92 bool stm32_gpio_is_secure_at_reset(unsigned int bank); 93 94 /* Return node offset for target GPIO bank ID @bank or a FDT error code */ 95 int stm32_get_gpio_bank_pinctrl_node(void *fdt, unsigned int bank); 96 97 /* Get the chip revision */ 98 uint32_t stm32mp_get_chip_version(void); 99 /* Get the chip device ID */ 100 uint32_t stm32mp_get_chip_dev_id(void); 101 102 /* Get SOC name */ 103 #define STM32_SOC_NAME_SIZE 20 104 void stm32mp_get_soc_name(char name[STM32_SOC_NAME_SIZE]); 105 106 /* Print CPU information */ 107 void stm32mp_print_cpuinfo(void); 108 109 /* Print board information */ 110 void stm32mp_print_boardinfo(void); 111 112 /* Initialise the IO layer and register platform IO devices */ 113 void stm32mp_io_setup(void); 114 115 /* Functions to map DDR in MMU with non-cacheable attribute, and unmap it */ 116 int stm32mp_map_ddr_non_cacheable(void); 117 int stm32mp_unmap_ddr(void); 118 119 /* Function to save boot info */ 120 void stm32_save_boot_info(boot_api_context_t *boot_context); 121 /* Function to get boot peripheral info */ 122 void stm32_get_boot_interface(uint32_t *interface, uint32_t *instance); 123 /* Function to get BOOT_MODE backup register address */ 124 uintptr_t stm32_get_bkpr_boot_mode_addr(void); 125 126 /* Display board information from the value found in OTP fuse */ 127 void stm32_display_board_info(uint32_t board_id); 128 129 #if PSA_FWU_SUPPORT 130 void stm32mp1_fwu_set_boot_idx(void); 131 uint32_t stm32_get_and_dec_fwu_trial_boot_cnt(void); 132 void stm32_set_max_fwu_trial_boot_cnt(void); 133 #endif /* PSA_FWU_SUPPORT */ 134 135 #endif /* STM32MP_COMMON_H */ 136