1 /* 2 * Copyright (C) 2018-2021, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef STM32MP_COMMON_H 8 #define STM32MP_COMMON_H 9 10 #include <stdbool.h> 11 12 #include <platform_def.h> 13 14 #define JEDEC_ST_BKID U(0x0) 15 #define JEDEC_ST_MFID U(0x20) 16 17 /* Functions to save and get boot context address given by ROM code */ 18 void stm32mp_save_boot_ctx_address(uintptr_t address); 19 uintptr_t stm32mp_get_boot_ctx_address(void); 20 uint16_t stm32mp_get_boot_itf_selected(void); 21 22 bool stm32mp_is_single_core(void); 23 bool stm32mp_is_closed_device(void); 24 25 /* Return the base address of the DDR controller */ 26 uintptr_t stm32mp_ddrctrl_base(void); 27 28 /* Return the base address of the DDR PHY */ 29 uintptr_t stm32mp_ddrphyc_base(void); 30 31 /* Return the base address of the PWR peripheral */ 32 uintptr_t stm32mp_pwr_base(void); 33 34 /* Return the base address of the RCC peripheral */ 35 uintptr_t stm32mp_rcc_base(void); 36 37 /* Check MMU status to allow spinlock use */ 38 bool stm32mp_lock_available(void); 39 40 /* Get IWDG platform instance ID from peripheral IO memory base address */ 41 uint32_t stm32_iwdg_get_instance(uintptr_t base); 42 43 /* Return bitflag mask for expected IWDG configuration from OTP content */ 44 uint32_t stm32_iwdg_get_otp_config(uint32_t iwdg_inst); 45 46 #if defined(IMAGE_BL2) 47 /* Update OTP shadow registers with IWDG configuration from device tree */ 48 uint32_t stm32_iwdg_shadow_update(uint32_t iwdg_inst, uint32_t flags); 49 #endif 50 51 #if STM32MP_UART_PROGRAMMER 52 /* Get the UART address from its instance number */ 53 uintptr_t get_uart_address(uint32_t instance_nb); 54 #endif 55 56 /* 57 * Platform util functions for the GPIO driver 58 * @bank: Target GPIO bank ID as per DT bindings 59 * 60 * Platform shall implement these functions to provide to stm32_gpio 61 * driver the resource reference for a target GPIO bank. That are 62 * memory mapped interface base address, interface offset (see below) 63 * and clock identifier. 64 * 65 * stm32_get_gpio_bank_offset() returns a bank offset that is used to 66 * check DT configuration matches platform implementation of the banks 67 * description. 68 */ 69 uintptr_t stm32_get_gpio_bank_base(unsigned int bank); 70 unsigned long stm32_get_gpio_bank_clock(unsigned int bank); 71 uint32_t stm32_get_gpio_bank_offset(unsigned int bank); 72 73 /* Return node offset for target GPIO bank ID @bank or a FDT error code */ 74 int stm32_get_gpio_bank_pinctrl_node(void *fdt, unsigned int bank); 75 76 /* Get the chip revision */ 77 uint32_t stm32mp_get_chip_version(void); 78 /* Get the chip device ID */ 79 uint32_t stm32mp_get_chip_dev_id(void); 80 81 /* Get SOC name */ 82 #define STM32_SOC_NAME_SIZE 20 83 void stm32mp_get_soc_name(char name[STM32_SOC_NAME_SIZE]); 84 85 /* Print CPU information */ 86 void stm32mp_print_cpuinfo(void); 87 88 /* Print board information */ 89 void stm32mp_print_boardinfo(void); 90 91 /* 92 * Util for clock gating and to get clock rate for stm32 and platform drivers 93 * @id: Target clock ID, ID used in clock DT bindings 94 */ 95 bool stm32mp_clk_is_enabled(unsigned long id); 96 void stm32mp_clk_enable(unsigned long id); 97 void stm32mp_clk_disable(unsigned long id); 98 unsigned long stm32mp_clk_get_rate(unsigned long id); 99 100 /* Initialise the IO layer and register platform IO devices */ 101 void stm32mp_io_setup(void); 102 103 #if STM32MP_USE_STM32IMAGE 104 /* 105 * Check that the STM32 header of a .stm32 binary image is valid 106 * @param header: pointer to the stm32 image header 107 * @param buffer: address of the binary image (payload) 108 * @return: 0 on success, negative value in case of error 109 */ 110 int stm32mp_check_header(boot_api_image_header_t *header, uintptr_t buffer); 111 #endif /* STM32MP_USE_STM32IMAGE */ 112 113 /* Functions to map DDR in MMU with non-cacheable attribute, and unmap it */ 114 int stm32mp_map_ddr_non_cacheable(void); 115 int stm32mp_unmap_ddr(void); 116 117 #endif /* STM32MP_COMMON_H */ 118