1*c9d75b3cSYann Gautier /* 2*c9d75b3cSYann Gautier * Copyright (C) 2018-2019, STMicroelectronics - All Rights Reserved 3*c9d75b3cSYann Gautier * 4*c9d75b3cSYann Gautier * SPDX-License-Identifier: BSD-3-Clause 5*c9d75b3cSYann Gautier */ 6*c9d75b3cSYann Gautier 7*c9d75b3cSYann Gautier #ifndef STM32MP_COMMON_H 8*c9d75b3cSYann Gautier #define STM32MP_COMMON_H 9*c9d75b3cSYann Gautier 10*c9d75b3cSYann Gautier /* Functions to save and get boot context address given by ROM code */ 11*c9d75b3cSYann Gautier void stm32mp1_save_boot_ctx_address(uintptr_t address); 12*c9d75b3cSYann Gautier uintptr_t stm32mp1_get_boot_ctx_address(void); 13*c9d75b3cSYann Gautier 14*c9d75b3cSYann Gautier /* 15*c9d75b3cSYann Gautier * Platform util functions for the GPIO driver 16*c9d75b3cSYann Gautier * @bank: Target GPIO bank ID as per DT bindings 17*c9d75b3cSYann Gautier * 18*c9d75b3cSYann Gautier * Platform shall implement these functions to provide to stm32_gpio 19*c9d75b3cSYann Gautier * driver the resource reference for a target GPIO bank. That are 20*c9d75b3cSYann Gautier * memory mapped interface base address, interface offset (see below) 21*c9d75b3cSYann Gautier * and clock identifier. 22*c9d75b3cSYann Gautier * 23*c9d75b3cSYann Gautier * stm32_get_gpio_bank_offset() returns a bank offset that is used to 24*c9d75b3cSYann Gautier * check DT configuration matches platform implementation of the banks 25*c9d75b3cSYann Gautier * description. 26*c9d75b3cSYann Gautier */ 27*c9d75b3cSYann Gautier uintptr_t stm32_get_gpio_bank_base(unsigned int bank); 28*c9d75b3cSYann Gautier unsigned long stm32_get_gpio_bank_clock(unsigned int bank); 29*c9d75b3cSYann Gautier uint32_t stm32_get_gpio_bank_offset(unsigned int bank); 30*c9d75b3cSYann Gautier 31*c9d75b3cSYann Gautier /* Initialise the IO layer and register platform IO devices */ 32*c9d75b3cSYann Gautier void stm32mp1_io_setup(void); 33*c9d75b3cSYann Gautier 34*c9d75b3cSYann Gautier #endif /* STM32MP_COMMON_H */ 35