1 /* 2 * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <string.h> 9 10 #include <arch_helpers.h> 11 #include <common/debug.h> 12 #include <common/desc_image_load.h> 13 #include <drivers/io/io_block.h> 14 #include <drivers/io/io_driver.h> 15 #include <drivers/io/io_fip.h> 16 #include <drivers/io/io_memmap.h> 17 #include <drivers/io/io_mtd.h> 18 #include <drivers/io/io_storage.h> 19 #include <drivers/mmc.h> 20 #include <drivers/partition/partition.h> 21 #include <drivers/raw_nand.h> 22 #include <drivers/spi_nand.h> 23 #include <drivers/spi_nor.h> 24 #include <drivers/st/io_mmc.h> 25 #include <drivers/st/stm32_fmc2_nand.h> 26 #include <drivers/st/stm32_qspi.h> 27 #include <drivers/st/stm32_sdmmc2.h> 28 #include <drivers/usb_device.h> 29 #include <lib/fconf/fconf.h> 30 #include <lib/mmio.h> 31 #include <lib/utils.h> 32 #include <plat/common/platform.h> 33 #include <tools_share/firmware_image_package.h> 34 35 #include <platform_def.h> 36 #include <stm32cubeprogrammer.h> 37 #include <stm32mp_fconf_getter.h> 38 #include <usb_dfu.h> 39 40 /* IO devices */ 41 uintptr_t fip_dev_handle; 42 uintptr_t storage_dev_handle; 43 44 static const io_dev_connector_t *fip_dev_con; 45 46 #if STM32MP_SDMMC || STM32MP_EMMC 47 static struct mmc_device_info mmc_info; 48 49 static uint32_t block_buffer[MMC_BLOCK_SIZE] __aligned(MMC_BLOCK_SIZE); 50 51 static io_block_dev_spec_t mmc_block_dev_spec = { 52 /* It's used as temp buffer in block driver */ 53 .buffer = { 54 .offset = (size_t)&block_buffer, 55 .length = MMC_BLOCK_SIZE, 56 }, 57 .ops = { 58 .read = mmc_read_blocks, 59 .write = NULL, 60 }, 61 .block_size = MMC_BLOCK_SIZE, 62 }; 63 64 static const io_dev_connector_t *mmc_dev_con; 65 #endif /* STM32MP_SDMMC || STM32MP_EMMC */ 66 67 #if STM32MP_SPI_NOR 68 static io_mtd_dev_spec_t spi_nor_dev_spec = { 69 .ops = { 70 .init = spi_nor_init, 71 .read = spi_nor_read, 72 }, 73 }; 74 #endif 75 76 #if STM32MP_RAW_NAND 77 static io_mtd_dev_spec_t nand_dev_spec = { 78 .ops = { 79 .init = nand_raw_init, 80 .read = nand_read, 81 .seek = nand_seek_bb 82 }, 83 }; 84 85 static const io_dev_connector_t *nand_dev_con; 86 #endif 87 88 #if STM32MP_SPI_NAND 89 static io_mtd_dev_spec_t spi_nand_dev_spec = { 90 .ops = { 91 .init = spi_nand_init, 92 .read = nand_read, 93 .seek = nand_seek_bb 94 }, 95 }; 96 #endif 97 98 #if STM32MP_SPI_NAND || STM32MP_SPI_NOR 99 static const io_dev_connector_t *spi_dev_con; 100 #endif 101 102 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER 103 static const io_dev_connector_t *memmap_dev_con; 104 #endif 105 106 io_block_spec_t image_block_spec = { 107 .offset = 0U, 108 .length = 0U, 109 }; 110 111 int open_fip(const uintptr_t spec) 112 { 113 return io_dev_init(fip_dev_handle, (uintptr_t)FIP_IMAGE_ID); 114 } 115 116 int open_storage(const uintptr_t spec) 117 { 118 return io_dev_init(storage_dev_handle, 0); 119 } 120 121 static void print_boot_device(boot_api_context_t *boot_context) 122 { 123 switch (boot_context->boot_interface_selected) { 124 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: 125 INFO("Using SDMMC\n"); 126 break; 127 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: 128 INFO("Using EMMC\n"); 129 break; 130 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI: 131 INFO("Using QSPI NOR\n"); 132 break; 133 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC: 134 INFO("Using FMC NAND\n"); 135 break; 136 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI: 137 INFO("Using SPI NAND\n"); 138 break; 139 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART: 140 INFO("Using UART\n"); 141 break; 142 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB: 143 INFO("Using USB\n"); 144 break; 145 default: 146 ERROR("Boot interface %u not found\n", 147 boot_context->boot_interface_selected); 148 panic(); 149 break; 150 } 151 152 if (boot_context->boot_interface_instance != 0U) { 153 INFO(" Instance %d\n", boot_context->boot_interface_instance); 154 } 155 } 156 157 #if STM32MP_SDMMC || STM32MP_EMMC 158 static void boot_mmc(enum mmc_device_type mmc_dev_type, 159 uint16_t boot_interface_instance) 160 { 161 int io_result __unused; 162 struct stm32_sdmmc2_params params; 163 164 zeromem(¶ms, sizeof(struct stm32_sdmmc2_params)); 165 166 mmc_info.mmc_dev_type = mmc_dev_type; 167 168 switch (boot_interface_instance) { 169 case 1: 170 params.reg_base = STM32MP_SDMMC1_BASE; 171 break; 172 case 2: 173 params.reg_base = STM32MP_SDMMC2_BASE; 174 break; 175 case 3: 176 params.reg_base = STM32MP_SDMMC3_BASE; 177 break; 178 default: 179 WARN("SDMMC instance not found, using default\n"); 180 if (mmc_dev_type == MMC_IS_SD) { 181 params.reg_base = STM32MP_SDMMC1_BASE; 182 } else { 183 params.reg_base = STM32MP_SDMMC2_BASE; 184 } 185 break; 186 } 187 188 params.device_info = &mmc_info; 189 if (stm32_sdmmc2_mmc_init(¶ms) != 0) { 190 ERROR("SDMMC%u init failed\n", boot_interface_instance); 191 panic(); 192 } 193 194 /* Open MMC as a block device to read GPT table */ 195 io_result = register_io_dev_block(&mmc_dev_con); 196 if (io_result != 0) { 197 panic(); 198 } 199 200 io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_block_dev_spec, 201 &storage_dev_handle); 202 assert(io_result == 0); 203 } 204 #endif /* STM32MP_SDMMC || STM32MP_EMMC */ 205 206 #if STM32MP_SPI_NOR 207 static void boot_spi_nor(boot_api_context_t *boot_context) 208 { 209 int io_result __unused; 210 211 io_result = stm32_qspi_init(); 212 assert(io_result == 0); 213 214 io_result = register_io_dev_mtd(&spi_dev_con); 215 assert(io_result == 0); 216 217 /* Open connections to device */ 218 io_result = io_dev_open(spi_dev_con, 219 (uintptr_t)&spi_nor_dev_spec, 220 &storage_dev_handle); 221 assert(io_result == 0); 222 } 223 #endif /* STM32MP_SPI_NOR */ 224 225 #if STM32MP_RAW_NAND 226 static void boot_fmc2_nand(boot_api_context_t *boot_context) 227 { 228 int io_result __unused; 229 230 io_result = stm32_fmc2_init(); 231 assert(io_result == 0); 232 233 /* Register the IO device on this platform */ 234 io_result = register_io_dev_mtd(&nand_dev_con); 235 assert(io_result == 0); 236 237 /* Open connections to device */ 238 io_result = io_dev_open(nand_dev_con, (uintptr_t)&nand_dev_spec, 239 &storage_dev_handle); 240 assert(io_result == 0); 241 } 242 #endif /* STM32MP_RAW_NAND */ 243 244 #if STM32MP_SPI_NAND 245 static void boot_spi_nand(boot_api_context_t *boot_context) 246 { 247 int io_result __unused; 248 249 io_result = stm32_qspi_init(); 250 assert(io_result == 0); 251 252 io_result = register_io_dev_mtd(&spi_dev_con); 253 assert(io_result == 0); 254 255 /* Open connections to device */ 256 io_result = io_dev_open(spi_dev_con, 257 (uintptr_t)&spi_nand_dev_spec, 258 &storage_dev_handle); 259 assert(io_result == 0); 260 } 261 #endif /* STM32MP_SPI_NAND */ 262 263 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER 264 static void mmap_io_setup(void) 265 { 266 int io_result __unused; 267 268 io_result = register_io_dev_memmap(&memmap_dev_con); 269 assert(io_result == 0); 270 271 io_result = io_dev_open(memmap_dev_con, (uintptr_t)NULL, 272 &storage_dev_handle); 273 assert(io_result == 0); 274 } 275 276 #if STM32MP_UART_PROGRAMMER 277 static void stm32cubeprogrammer_uart(void) 278 { 279 int ret __unused; 280 boot_api_context_t *boot_context = 281 (boot_api_context_t *)stm32mp_get_boot_ctx_address(); 282 uintptr_t uart_base; 283 284 uart_base = get_uart_address(boot_context->boot_interface_instance); 285 ret = stm32cubeprog_uart_load(uart_base, DWL_BUFFER_BASE, DWL_BUFFER_SIZE); 286 assert(ret == 0); 287 } 288 #endif 289 290 #if STM32MP_USB_PROGRAMMER 291 static void stm32cubeprogrammer_usb(void) 292 { 293 int ret __unused; 294 struct usb_handle *pdev; 295 296 /* Init USB on platform */ 297 pdev = usb_dfu_plat_init(); 298 299 ret = stm32cubeprog_usb_load(pdev, DWL_BUFFER_BASE, DWL_BUFFER_SIZE); 300 assert(ret == 0); 301 } 302 #endif 303 #endif /* STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER */ 304 305 306 void stm32mp_io_setup(void) 307 { 308 int io_result __unused; 309 boot_api_context_t *boot_context = 310 (boot_api_context_t *)stm32mp_get_boot_ctx_address(); 311 312 print_boot_device(boot_context); 313 314 if ((boot_context->boot_partition_used_toboot == 1U) || 315 (boot_context->boot_partition_used_toboot == 2U)) { 316 INFO("Boot used partition fsbl%u\n", 317 boot_context->boot_partition_used_toboot); 318 } 319 320 io_result = register_io_dev_fip(&fip_dev_con); 321 assert(io_result == 0); 322 323 io_result = io_dev_open(fip_dev_con, (uintptr_t)NULL, 324 &fip_dev_handle); 325 326 switch (boot_context->boot_interface_selected) { 327 #if STM32MP_SDMMC 328 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: 329 dmbsy(); 330 boot_mmc(MMC_IS_SD, boot_context->boot_interface_instance); 331 break; 332 #endif 333 #if STM32MP_EMMC 334 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: 335 dmbsy(); 336 boot_mmc(MMC_IS_EMMC, boot_context->boot_interface_instance); 337 break; 338 #endif 339 #if STM32MP_SPI_NOR 340 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI: 341 dmbsy(); 342 boot_spi_nor(boot_context); 343 break; 344 #endif 345 #if STM32MP_RAW_NAND 346 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC: 347 dmbsy(); 348 boot_fmc2_nand(boot_context); 349 break; 350 #endif 351 #if STM32MP_SPI_NAND 352 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI: 353 dmbsy(); 354 boot_spi_nand(boot_context); 355 break; 356 #endif 357 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER 358 #if STM32MP_UART_PROGRAMMER 359 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART: 360 #endif 361 #if STM32MP_USB_PROGRAMMER 362 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB: 363 #endif 364 dmbsy(); 365 mmap_io_setup(); 366 break; 367 #endif 368 369 default: 370 ERROR("Boot interface %d not supported\n", 371 boot_context->boot_interface_selected); 372 panic(); 373 break; 374 } 375 } 376 377 int bl2_plat_handle_pre_image_load(unsigned int image_id) 378 { 379 static bool gpt_init_done __unused; 380 uint16_t boot_itf = stm32mp_get_boot_itf_selected(); 381 382 switch (boot_itf) { 383 #if STM32MP_SDMMC || STM32MP_EMMC 384 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: 385 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: 386 if (!gpt_init_done) { 387 const partition_entry_t *entry; 388 389 partition_init(GPT_IMAGE_ID); 390 entry = get_partition_entry(FIP_IMAGE_NAME); 391 if (entry == NULL) { 392 ERROR("Could NOT find the %s partition!\n", 393 FIP_IMAGE_NAME); 394 return -ENOENT; 395 } 396 397 image_block_spec.offset = entry->start; 398 image_block_spec.length = entry->length; 399 400 gpt_init_done = true; 401 } else { 402 bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id); 403 404 mmc_block_dev_spec.buffer.offset = bl_mem_params->image_info.image_base; 405 mmc_block_dev_spec.buffer.length = bl_mem_params->image_info.image_max_size; 406 } 407 408 break; 409 #endif 410 411 #if STM32MP_RAW_NAND || STM32MP_SPI_NAND 412 #if STM32MP_RAW_NAND 413 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC: 414 #endif 415 #if STM32MP_SPI_NAND 416 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI: 417 #endif 418 image_block_spec.offset = STM32MP_NAND_FIP_OFFSET; 419 break; 420 #endif 421 422 #if STM32MP_SPI_NOR 423 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI: 424 image_block_spec.offset = STM32MP_NOR_FIP_OFFSET; 425 break; 426 #endif 427 428 #if STM32MP_UART_PROGRAMMER 429 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART: 430 if (image_id == FW_CONFIG_ID) { 431 stm32cubeprogrammer_uart(); 432 /* FIP loaded at DWL address */ 433 image_block_spec.offset = DWL_BUFFER_BASE; 434 image_block_spec.length = DWL_BUFFER_SIZE; 435 } 436 break; 437 #endif 438 #if STM32MP_USB_PROGRAMMER 439 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB: 440 if (image_id == FW_CONFIG_ID) { 441 stm32cubeprogrammer_usb(); 442 /* FIP loaded at DWL address */ 443 image_block_spec.offset = DWL_BUFFER_BASE; 444 image_block_spec.length = DWL_BUFFER_SIZE; 445 } 446 break; 447 #endif 448 449 default: 450 ERROR("FIP Not found\n"); 451 panic(); 452 } 453 454 return 0; 455 } 456 457 /* 458 * Return an IO device handle and specification which can be used to access 459 * an image. Use this to enforce platform load policy. 460 */ 461 int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle, 462 uintptr_t *image_spec) 463 { 464 int rc; 465 const struct plat_io_policy *policy; 466 467 policy = FCONF_GET_PROPERTY(stm32mp, io_policies, image_id); 468 rc = policy->check(policy->image_spec); 469 if (rc == 0) { 470 *image_spec = policy->image_spec; 471 *dev_handle = *(policy->dev_handle); 472 } 473 474 return rc; 475 } 476