1c9d75b3cSYann Gautier /* 2c9d75b3cSYann Gautier * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. 3c9d75b3cSYann Gautier * 4c9d75b3cSYann Gautier * SPDX-License-Identifier: BSD-3-Clause 5c9d75b3cSYann Gautier */ 6c9d75b3cSYann Gautier 7c9d75b3cSYann Gautier #include <assert.h> 8c9d75b3cSYann Gautier #include <string.h> 9c9d75b3cSYann Gautier 10c9d75b3cSYann Gautier #include <platform_def.h> 11c9d75b3cSYann Gautier 12c9d75b3cSYann Gautier #include <arch_helpers.h> 13c9d75b3cSYann Gautier #include <common/debug.h> 14c9d75b3cSYann Gautier #include <drivers/io/io_block.h> 15c9d75b3cSYann Gautier #include <drivers/io/io_driver.h> 16c9d75b3cSYann Gautier #include <drivers/io/io_dummy.h> 17c9d75b3cSYann Gautier #include <drivers/io/io_storage.h> 18c9d75b3cSYann Gautier #include <drivers/mmc.h> 19c9d75b3cSYann Gautier #include <drivers/partition/partition.h> 20c9d75b3cSYann Gautier #include <drivers/st/io_mmc.h> 21c9d75b3cSYann Gautier #include <drivers/st/io_stm32image.h> 22c9d75b3cSYann Gautier #include <drivers/st/stm32_sdmmc2.h> 23c9d75b3cSYann Gautier #include <lib/mmio.h> 24c9d75b3cSYann Gautier #include <lib/utils.h> 25c9d75b3cSYann Gautier #include <plat/common/platform.h> 26c9d75b3cSYann Gautier 27c9d75b3cSYann Gautier /* IO devices */ 28c9d75b3cSYann Gautier static const io_dev_connector_t *dummy_dev_con; 29c9d75b3cSYann Gautier static uintptr_t dummy_dev_handle; 30c9d75b3cSYann Gautier static uintptr_t dummy_dev_spec; 31c9d75b3cSYann Gautier 32c9d75b3cSYann Gautier static uintptr_t image_dev_handle; 33*46554b64SNicolas Le Bayon static uintptr_t storage_dev_handle; 34c9d75b3cSYann Gautier 35*46554b64SNicolas Le Bayon #if STM32MP_SDMMC || STM32MP_EMMC 36c9d75b3cSYann Gautier static io_block_spec_t gpt_block_spec = { 37c9d75b3cSYann Gautier .offset = 0, 38c9d75b3cSYann Gautier .length = 34 * MMC_BLOCK_SIZE, /* Size of GPT table */ 39c9d75b3cSYann Gautier }; 40c9d75b3cSYann Gautier 41c9d75b3cSYann Gautier static uint32_t block_buffer[MMC_BLOCK_SIZE] __aligned(MMC_BLOCK_SIZE); 42c9d75b3cSYann Gautier 43c9d75b3cSYann Gautier static const io_block_dev_spec_t mmc_block_dev_spec = { 44c9d75b3cSYann Gautier /* It's used as temp buffer in block driver */ 45c9d75b3cSYann Gautier .buffer = { 46c9d75b3cSYann Gautier .offset = (size_t)&block_buffer, 47c9d75b3cSYann Gautier .length = MMC_BLOCK_SIZE, 48c9d75b3cSYann Gautier }, 49c9d75b3cSYann Gautier .ops = { 50c9d75b3cSYann Gautier .read = mmc_read_blocks, 51c9d75b3cSYann Gautier .write = NULL, 52c9d75b3cSYann Gautier }, 53c9d75b3cSYann Gautier .block_size = MMC_BLOCK_SIZE, 54c9d75b3cSYann Gautier }; 55c9d75b3cSYann Gautier 56c9d75b3cSYann Gautier static const io_dev_connector_t *mmc_dev_con; 57*46554b64SNicolas Le Bayon #endif /* STM32MP_SDMMC || STM32MP_EMMC */ 58c9d75b3cSYann Gautier 591989a19cSYann Gautier #ifdef AARCH32_SP_OPTEE 601989a19cSYann Gautier static const struct stm32image_part_info optee_header_partition_spec = { 611989a19cSYann Gautier .name = OPTEE_HEADER_IMAGE_NAME, 621989a19cSYann Gautier .binary_type = OPTEE_HEADER_BINARY_TYPE, 631989a19cSYann Gautier }; 641989a19cSYann Gautier 651989a19cSYann Gautier static const struct stm32image_part_info optee_pager_partition_spec = { 661989a19cSYann Gautier .name = OPTEE_PAGER_IMAGE_NAME, 671989a19cSYann Gautier .binary_type = OPTEE_PAGER_BINARY_TYPE, 681989a19cSYann Gautier }; 691989a19cSYann Gautier 701989a19cSYann Gautier static const struct stm32image_part_info optee_paged_partition_spec = { 711989a19cSYann Gautier .name = OPTEE_PAGED_IMAGE_NAME, 721989a19cSYann Gautier .binary_type = OPTEE_PAGED_BINARY_TYPE, 731989a19cSYann Gautier }; 741989a19cSYann Gautier #else 75c9d75b3cSYann Gautier static const io_block_spec_t bl32_block_spec = { 76c9d75b3cSYann Gautier .offset = BL32_BASE, 773f9c9784SYann Gautier .length = STM32MP_BL32_SIZE 78c9d75b3cSYann Gautier }; 791989a19cSYann Gautier #endif 80c9d75b3cSYann Gautier 81c9d75b3cSYann Gautier static const io_block_spec_t bl2_block_spec = { 82c9d75b3cSYann Gautier .offset = BL2_BASE, 833f9c9784SYann Gautier .length = STM32MP_BL2_SIZE, 84c9d75b3cSYann Gautier }; 85c9d75b3cSYann Gautier 86c9d75b3cSYann Gautier static const struct stm32image_part_info bl33_partition_spec = { 87c9d75b3cSYann Gautier .name = BL33_IMAGE_NAME, 88c9d75b3cSYann Gautier .binary_type = BL33_BINARY_TYPE, 89c9d75b3cSYann Gautier }; 90c9d75b3cSYann Gautier 91c9d75b3cSYann Gautier enum { 92c9d75b3cSYann Gautier IMG_IDX_BL33, 931989a19cSYann Gautier #ifdef AARCH32_SP_OPTEE 941989a19cSYann Gautier IMG_IDX_OPTEE_HEADER, 951989a19cSYann Gautier IMG_IDX_OPTEE_PAGER, 961989a19cSYann Gautier IMG_IDX_OPTEE_PAGED, 971989a19cSYann Gautier #endif 98c9d75b3cSYann Gautier IMG_IDX_NUM 99c9d75b3cSYann Gautier }; 100c9d75b3cSYann Gautier 101*46554b64SNicolas Le Bayon static struct stm32image_device_info stm32image_dev_info_spec __unused = { 102c9d75b3cSYann Gautier .lba_size = MMC_BLOCK_SIZE, 103c9d75b3cSYann Gautier .part_info[IMG_IDX_BL33] = { 104c9d75b3cSYann Gautier .name = BL33_IMAGE_NAME, 105c9d75b3cSYann Gautier .binary_type = BL33_BINARY_TYPE, 106c9d75b3cSYann Gautier }, 1071989a19cSYann Gautier #ifdef AARCH32_SP_OPTEE 1081989a19cSYann Gautier .part_info[IMG_IDX_OPTEE_HEADER] = { 1091989a19cSYann Gautier .name = OPTEE_HEADER_IMAGE_NAME, 1101989a19cSYann Gautier .binary_type = OPTEE_HEADER_BINARY_TYPE, 1111989a19cSYann Gautier }, 1121989a19cSYann Gautier .part_info[IMG_IDX_OPTEE_PAGER] = { 1131989a19cSYann Gautier .name = OPTEE_PAGER_IMAGE_NAME, 1141989a19cSYann Gautier .binary_type = OPTEE_PAGER_BINARY_TYPE, 1151989a19cSYann Gautier }, 1161989a19cSYann Gautier .part_info[IMG_IDX_OPTEE_PAGED] = { 1171989a19cSYann Gautier .name = OPTEE_PAGED_IMAGE_NAME, 1181989a19cSYann Gautier .binary_type = OPTEE_PAGED_BINARY_TYPE, 1191989a19cSYann Gautier }, 1201989a19cSYann Gautier #endif 121c9d75b3cSYann Gautier }; 122c9d75b3cSYann Gautier 123c9d75b3cSYann Gautier static io_block_spec_t stm32image_block_spec = { 124c9d75b3cSYann Gautier .offset = 0, 125c9d75b3cSYann Gautier .length = 0, 126c9d75b3cSYann Gautier }; 127c9d75b3cSYann Gautier 128*46554b64SNicolas Le Bayon static const io_dev_connector_t *stm32image_dev_con __unused; 129c9d75b3cSYann Gautier 130c9d75b3cSYann Gautier static int open_dummy(const uintptr_t spec); 131c9d75b3cSYann Gautier static int open_image(const uintptr_t spec); 132c9d75b3cSYann Gautier static int open_storage(const uintptr_t spec); 133c9d75b3cSYann Gautier 134c9d75b3cSYann Gautier struct plat_io_policy { 135c9d75b3cSYann Gautier uintptr_t *dev_handle; 136c9d75b3cSYann Gautier uintptr_t image_spec; 137c9d75b3cSYann Gautier int (*check)(const uintptr_t spec); 138c9d75b3cSYann Gautier }; 139c9d75b3cSYann Gautier 140c9d75b3cSYann Gautier static const struct plat_io_policy policies[] = { 141c9d75b3cSYann Gautier [BL2_IMAGE_ID] = { 142c9d75b3cSYann Gautier .dev_handle = &dummy_dev_handle, 143c9d75b3cSYann Gautier .image_spec = (uintptr_t)&bl2_block_spec, 144c9d75b3cSYann Gautier .check = open_dummy 145c9d75b3cSYann Gautier }, 1461989a19cSYann Gautier #ifdef AARCH32_SP_OPTEE 1471989a19cSYann Gautier [BL32_IMAGE_ID] = { 1481989a19cSYann Gautier .dev_handle = &image_dev_handle, 1491989a19cSYann Gautier .image_spec = (uintptr_t)&optee_header_partition_spec, 1501989a19cSYann Gautier .check = open_image 1511989a19cSYann Gautier }, 1521989a19cSYann Gautier [BL32_EXTRA1_IMAGE_ID] = { 1531989a19cSYann Gautier .dev_handle = &image_dev_handle, 1541989a19cSYann Gautier .image_spec = (uintptr_t)&optee_pager_partition_spec, 1551989a19cSYann Gautier .check = open_image 1561989a19cSYann Gautier }, 1571989a19cSYann Gautier [BL32_EXTRA2_IMAGE_ID] = { 1581989a19cSYann Gautier .dev_handle = &image_dev_handle, 1591989a19cSYann Gautier .image_spec = (uintptr_t)&optee_paged_partition_spec, 1601989a19cSYann Gautier .check = open_image 1611989a19cSYann Gautier }, 1621989a19cSYann Gautier #else 163c9d75b3cSYann Gautier [BL32_IMAGE_ID] = { 164c9d75b3cSYann Gautier .dev_handle = &dummy_dev_handle, 165c9d75b3cSYann Gautier .image_spec = (uintptr_t)&bl32_block_spec, 166c9d75b3cSYann Gautier .check = open_dummy 167c9d75b3cSYann Gautier }, 1681989a19cSYann Gautier #endif 169c9d75b3cSYann Gautier [BL33_IMAGE_ID] = { 170c9d75b3cSYann Gautier .dev_handle = &image_dev_handle, 171c9d75b3cSYann Gautier .image_spec = (uintptr_t)&bl33_partition_spec, 172c9d75b3cSYann Gautier .check = open_image 173c9d75b3cSYann Gautier }, 174*46554b64SNicolas Le Bayon #if STM32MP_SDMMC || STM32MP_EMMC 175c9d75b3cSYann Gautier [GPT_IMAGE_ID] = { 176c9d75b3cSYann Gautier .dev_handle = &storage_dev_handle, 177c9d75b3cSYann Gautier .image_spec = (uintptr_t)&gpt_block_spec, 178c9d75b3cSYann Gautier .check = open_storage 179c9d75b3cSYann Gautier }, 180*46554b64SNicolas Le Bayon #endif 181c9d75b3cSYann Gautier [STM32_IMAGE_ID] = { 182c9d75b3cSYann Gautier .dev_handle = &storage_dev_handle, 183c9d75b3cSYann Gautier .image_spec = (uintptr_t)&stm32image_block_spec, 184c9d75b3cSYann Gautier .check = open_storage 185c9d75b3cSYann Gautier } 186c9d75b3cSYann Gautier }; 187c9d75b3cSYann Gautier 188c9d75b3cSYann Gautier static int open_dummy(const uintptr_t spec) 189c9d75b3cSYann Gautier { 190c9d75b3cSYann Gautier return io_dev_init(dummy_dev_handle, 0); 191c9d75b3cSYann Gautier } 192c9d75b3cSYann Gautier 193c9d75b3cSYann Gautier static int open_image(const uintptr_t spec) 194c9d75b3cSYann Gautier { 195c9d75b3cSYann Gautier return io_dev_init(image_dev_handle, 0); 196c9d75b3cSYann Gautier } 197c9d75b3cSYann Gautier 198c9d75b3cSYann Gautier static int open_storage(const uintptr_t spec) 199c9d75b3cSYann Gautier { 200c9d75b3cSYann Gautier return io_dev_init(storage_dev_handle, 0); 201c9d75b3cSYann Gautier } 202c9d75b3cSYann Gautier 203c9d75b3cSYann Gautier static void print_boot_device(boot_api_context_t *boot_context) 204c9d75b3cSYann Gautier { 205c9d75b3cSYann Gautier switch (boot_context->boot_interface_selected) { 206c9d75b3cSYann Gautier case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: 207c9d75b3cSYann Gautier INFO("Using SDMMC\n"); 208c9d75b3cSYann Gautier break; 209c9d75b3cSYann Gautier case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: 210c9d75b3cSYann Gautier INFO("Using EMMC\n"); 211c9d75b3cSYann Gautier break; 212c9d75b3cSYann Gautier default: 213c9d75b3cSYann Gautier ERROR("Boot interface not found\n"); 214c9d75b3cSYann Gautier panic(); 215c9d75b3cSYann Gautier break; 216c9d75b3cSYann Gautier } 217c9d75b3cSYann Gautier 218c9d75b3cSYann Gautier if (boot_context->boot_interface_instance != 0U) { 219c9d75b3cSYann Gautier INFO(" Instance %d\n", boot_context->boot_interface_instance); 220c9d75b3cSYann Gautier } 221c9d75b3cSYann Gautier } 222c9d75b3cSYann Gautier 223*46554b64SNicolas Le Bayon #if STM32MP_SDMMC || STM32MP_EMMC 2240b1aa772SYann Gautier static void boot_mmc(enum mmc_device_type mmc_dev_type, 2250b1aa772SYann Gautier uint16_t boot_interface_instance) 226c9d75b3cSYann Gautier { 227c9d75b3cSYann Gautier int io_result __unused; 228c9d75b3cSYann Gautier uint8_t idx; 229c9d75b3cSYann Gautier struct stm32image_part_info *part; 230c9d75b3cSYann Gautier struct stm32_sdmmc2_params params; 231c9d75b3cSYann Gautier struct mmc_device_info device_info; 232c9d75b3cSYann Gautier const partition_entry_t *entry; 233c9d75b3cSYann Gautier 23442beea8dSYann Gautier zeromem(&device_info, sizeof(struct mmc_device_info)); 23542beea8dSYann Gautier zeromem(¶ms, sizeof(struct stm32_sdmmc2_params)); 236c9d75b3cSYann Gautier 2370b1aa772SYann Gautier device_info.mmc_dev_type = mmc_dev_type; 238c9d75b3cSYann Gautier 2390b1aa772SYann Gautier switch (boot_interface_instance) { 240c9d75b3cSYann Gautier case 1: 2413f9c9784SYann Gautier params.reg_base = STM32MP_SDMMC1_BASE; 242c9d75b3cSYann Gautier break; 243c9d75b3cSYann Gautier case 2: 2443f9c9784SYann Gautier params.reg_base = STM32MP_SDMMC2_BASE; 245c9d75b3cSYann Gautier break; 246c9d75b3cSYann Gautier case 3: 2473f9c9784SYann Gautier params.reg_base = STM32MP_SDMMC3_BASE; 248c9d75b3cSYann Gautier break; 249c9d75b3cSYann Gautier default: 250c9d75b3cSYann Gautier WARN("SDMMC instance not found, using default\n"); 2510b1aa772SYann Gautier if (mmc_dev_type == MMC_IS_SD) { 2520b1aa772SYann Gautier params.reg_base = STM32MP_SDMMC1_BASE; 2530b1aa772SYann Gautier } else { 2540b1aa772SYann Gautier params.reg_base = STM32MP_SDMMC2_BASE; 2550b1aa772SYann Gautier } 256c9d75b3cSYann Gautier break; 257c9d75b3cSYann Gautier } 258c9d75b3cSYann Gautier 259c9d75b3cSYann Gautier params.device_info = &device_info; 260c9d75b3cSYann Gautier if (stm32_sdmmc2_mmc_init(¶ms) != 0) { 2610b1aa772SYann Gautier ERROR("SDMMC%u init failed\n", boot_interface_instance); 262c9d75b3cSYann Gautier panic(); 263c9d75b3cSYann Gautier } 264c9d75b3cSYann Gautier 265c9d75b3cSYann Gautier /* Open MMC as a block device to read GPT table */ 266c9d75b3cSYann Gautier io_result = register_io_dev_block(&mmc_dev_con); 267c9d75b3cSYann Gautier if (io_result != 0) { 268c9d75b3cSYann Gautier panic(); 269c9d75b3cSYann Gautier } 270c9d75b3cSYann Gautier 2710b1aa772SYann Gautier io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_block_dev_spec, 272c9d75b3cSYann Gautier &storage_dev_handle); 273c9d75b3cSYann Gautier assert(io_result == 0); 274c9d75b3cSYann Gautier 275c9d75b3cSYann Gautier partition_init(GPT_IMAGE_ID); 276c9d75b3cSYann Gautier 277c9d75b3cSYann Gautier io_result = io_dev_close(storage_dev_handle); 278c9d75b3cSYann Gautier assert(io_result == 0); 279c9d75b3cSYann Gautier 280c9d75b3cSYann Gautier stm32image_dev_info_spec.device_size = 281c9d75b3cSYann Gautier stm32_sdmmc2_mmc_get_device_size(); 282c9d75b3cSYann Gautier 283c9d75b3cSYann Gautier for (idx = 0U; idx < IMG_IDX_NUM; idx++) { 284c9d75b3cSYann Gautier part = &stm32image_dev_info_spec.part_info[idx]; 285c9d75b3cSYann Gautier entry = get_partition_entry(part->name); 286c9d75b3cSYann Gautier if (entry == NULL) { 2870b1aa772SYann Gautier ERROR("Partition %s not found\n", part->name); 288c9d75b3cSYann Gautier panic(); 289c9d75b3cSYann Gautier } 290c9d75b3cSYann Gautier 291c9d75b3cSYann Gautier part->part_offset = entry->start; 292c9d75b3cSYann Gautier part->bkp_offset = 0U; 293c9d75b3cSYann Gautier } 294c9d75b3cSYann Gautier 295c9d75b3cSYann Gautier /* 296c9d75b3cSYann Gautier * Re-open MMC with io_mmc, for better perfs compared to 297c9d75b3cSYann Gautier * io_block. 298c9d75b3cSYann Gautier */ 299c9d75b3cSYann Gautier io_result = register_io_dev_mmc(&mmc_dev_con); 300c9d75b3cSYann Gautier assert(io_result == 0); 301c9d75b3cSYann Gautier 302c9d75b3cSYann Gautier io_result = io_dev_open(mmc_dev_con, 0, &storage_dev_handle); 303c9d75b3cSYann Gautier assert(io_result == 0); 304c9d75b3cSYann Gautier 305c9d75b3cSYann Gautier io_result = register_io_dev_stm32image(&stm32image_dev_con); 306c9d75b3cSYann Gautier assert(io_result == 0); 307c9d75b3cSYann Gautier 308c9d75b3cSYann Gautier io_result = io_dev_open(stm32image_dev_con, 309c9d75b3cSYann Gautier (uintptr_t)&stm32image_dev_info_spec, 310c9d75b3cSYann Gautier &image_dev_handle); 311c9d75b3cSYann Gautier assert(io_result == 0); 3120b1aa772SYann Gautier } 313*46554b64SNicolas Le Bayon #endif /* STM32MP_SDMMC || STM32MP_EMMC */ 3140b1aa772SYann Gautier 3150b1aa772SYann Gautier void stm32mp_io_setup(void) 3160b1aa772SYann Gautier { 3170b1aa772SYann Gautier int io_result __unused; 3180b1aa772SYann Gautier boot_api_context_t *boot_context = 3190b1aa772SYann Gautier (boot_api_context_t *)stm32mp_get_boot_ctx_address(); 3200b1aa772SYann Gautier 3210b1aa772SYann Gautier print_boot_device(boot_context); 3220b1aa772SYann Gautier 3230b1aa772SYann Gautier if ((boot_context->boot_partition_used_toboot == 1U) || 3240b1aa772SYann Gautier (boot_context->boot_partition_used_toboot == 2U)) { 3250b1aa772SYann Gautier INFO("Boot used partition fsbl%d\n", 3260b1aa772SYann Gautier boot_context->boot_partition_used_toboot); 3270b1aa772SYann Gautier } 3280b1aa772SYann Gautier 3290b1aa772SYann Gautier io_result = register_io_dev_dummy(&dummy_dev_con); 3300b1aa772SYann Gautier assert(io_result == 0); 3310b1aa772SYann Gautier 3320b1aa772SYann Gautier io_result = io_dev_open(dummy_dev_con, dummy_dev_spec, 3330b1aa772SYann Gautier &dummy_dev_handle); 3340b1aa772SYann Gautier assert(io_result == 0); 3350b1aa772SYann Gautier 3360b1aa772SYann Gautier switch (boot_context->boot_interface_selected) { 337*46554b64SNicolas Le Bayon #if STM32MP_SDMMC 3380b1aa772SYann Gautier case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: 3390b1aa772SYann Gautier dmbsy(); 3400b1aa772SYann Gautier boot_mmc(MMC_IS_SD, boot_context->boot_interface_instance); 3410b1aa772SYann Gautier break; 342*46554b64SNicolas Le Bayon #endif 343*46554b64SNicolas Le Bayon #if STM32MP_EMMC 3440b1aa772SYann Gautier case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: 3450b1aa772SYann Gautier dmbsy(); 3460b1aa772SYann Gautier boot_mmc(MMC_IS_EMMC, boot_context->boot_interface_instance); 347c9d75b3cSYann Gautier break; 348*46554b64SNicolas Le Bayon #endif 349c9d75b3cSYann Gautier 350c9d75b3cSYann Gautier default: 351c9d75b3cSYann Gautier ERROR("Boot interface %d not supported\n", 352c9d75b3cSYann Gautier boot_context->boot_interface_selected); 353c9d75b3cSYann Gautier break; 354c9d75b3cSYann Gautier } 355c9d75b3cSYann Gautier } 356c9d75b3cSYann Gautier 357c9d75b3cSYann Gautier /* 358c9d75b3cSYann Gautier * Return an IO device handle and specification which can be used to access 359c9d75b3cSYann Gautier * an image. Use this to enforce platform load policy. 360c9d75b3cSYann Gautier */ 361c9d75b3cSYann Gautier int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle, 362c9d75b3cSYann Gautier uintptr_t *image_spec) 363c9d75b3cSYann Gautier { 364c9d75b3cSYann Gautier int rc; 365c9d75b3cSYann Gautier const struct plat_io_policy *policy; 366c9d75b3cSYann Gautier 367c9d75b3cSYann Gautier assert(image_id < ARRAY_SIZE(policies)); 368c9d75b3cSYann Gautier 369c9d75b3cSYann Gautier policy = &policies[image_id]; 370c9d75b3cSYann Gautier rc = policy->check(policy->image_spec); 371c9d75b3cSYann Gautier if (rc == 0) { 372c9d75b3cSYann Gautier *image_spec = policy->image_spec; 373c9d75b3cSYann Gautier *dev_handle = *(policy->dev_handle); 374c9d75b3cSYann Gautier } 375c9d75b3cSYann Gautier 376c9d75b3cSYann Gautier return rc; 377c9d75b3cSYann Gautier } 378