xref: /rk3399_ARM-atf/plat/st/common/bl2_io_storage.c (revision 0b1aa7727f70845eac4f789428a59ca6fe4fea58)
1c9d75b3cSYann Gautier /*
2c9d75b3cSYann Gautier  * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
3c9d75b3cSYann Gautier  *
4c9d75b3cSYann Gautier  * SPDX-License-Identifier: BSD-3-Clause
5c9d75b3cSYann Gautier  */
6c9d75b3cSYann Gautier 
7c9d75b3cSYann Gautier #include <assert.h>
8c9d75b3cSYann Gautier #include <string.h>
9c9d75b3cSYann Gautier 
10c9d75b3cSYann Gautier #include <platform_def.h>
11c9d75b3cSYann Gautier 
12c9d75b3cSYann Gautier #include <arch_helpers.h>
13c9d75b3cSYann Gautier #include <common/debug.h>
14c9d75b3cSYann Gautier #include <drivers/io/io_block.h>
15c9d75b3cSYann Gautier #include <drivers/io/io_driver.h>
16c9d75b3cSYann Gautier #include <drivers/io/io_dummy.h>
17c9d75b3cSYann Gautier #include <drivers/io/io_storage.h>
18c9d75b3cSYann Gautier #include <drivers/mmc.h>
19c9d75b3cSYann Gautier #include <drivers/partition/partition.h>
20c9d75b3cSYann Gautier #include <drivers/st/io_mmc.h>
21c9d75b3cSYann Gautier #include <drivers/st/io_stm32image.h>
22c9d75b3cSYann Gautier #include <drivers/st/stm32_sdmmc2.h>
23c9d75b3cSYann Gautier #include <lib/mmio.h>
24c9d75b3cSYann Gautier #include <lib/utils.h>
25c9d75b3cSYann Gautier #include <plat/common/platform.h>
26c9d75b3cSYann Gautier 
27c9d75b3cSYann Gautier /* IO devices */
28c9d75b3cSYann Gautier static const io_dev_connector_t *dummy_dev_con;
29c9d75b3cSYann Gautier static uintptr_t dummy_dev_handle;
30c9d75b3cSYann Gautier static uintptr_t dummy_dev_spec;
31c9d75b3cSYann Gautier 
32c9d75b3cSYann Gautier static uintptr_t image_dev_handle;
33c9d75b3cSYann Gautier 
34c9d75b3cSYann Gautier static io_block_spec_t gpt_block_spec = {
35c9d75b3cSYann Gautier 	.offset = 0,
36c9d75b3cSYann Gautier 	.length = 34 * MMC_BLOCK_SIZE, /* Size of GPT table */
37c9d75b3cSYann Gautier };
38c9d75b3cSYann Gautier 
39c9d75b3cSYann Gautier static uint32_t block_buffer[MMC_BLOCK_SIZE] __aligned(MMC_BLOCK_SIZE);
40c9d75b3cSYann Gautier 
41c9d75b3cSYann Gautier static const io_block_dev_spec_t mmc_block_dev_spec = {
42c9d75b3cSYann Gautier 	/* It's used as temp buffer in block driver */
43c9d75b3cSYann Gautier 	.buffer = {
44c9d75b3cSYann Gautier 		.offset = (size_t)&block_buffer,
45c9d75b3cSYann Gautier 		.length = MMC_BLOCK_SIZE,
46c9d75b3cSYann Gautier 	},
47c9d75b3cSYann Gautier 	.ops = {
48c9d75b3cSYann Gautier 		.read = mmc_read_blocks,
49c9d75b3cSYann Gautier 		.write = NULL,
50c9d75b3cSYann Gautier 	},
51c9d75b3cSYann Gautier 	.block_size = MMC_BLOCK_SIZE,
52c9d75b3cSYann Gautier };
53c9d75b3cSYann Gautier 
54c9d75b3cSYann Gautier static uintptr_t storage_dev_handle;
55c9d75b3cSYann Gautier static const io_dev_connector_t *mmc_dev_con;
56c9d75b3cSYann Gautier 
57c9d75b3cSYann Gautier static const io_block_spec_t bl32_block_spec = {
58c9d75b3cSYann Gautier 	.offset = BL32_BASE,
593f9c9784SYann Gautier 	.length = STM32MP_BL32_SIZE
60c9d75b3cSYann Gautier };
61c9d75b3cSYann Gautier 
62c9d75b3cSYann Gautier static const io_block_spec_t bl2_block_spec = {
63c9d75b3cSYann Gautier 	.offset = BL2_BASE,
643f9c9784SYann Gautier 	.length = STM32MP_BL2_SIZE,
65c9d75b3cSYann Gautier };
66c9d75b3cSYann Gautier 
67c9d75b3cSYann Gautier static const struct stm32image_part_info bl33_partition_spec = {
68c9d75b3cSYann Gautier 	.name = BL33_IMAGE_NAME,
69c9d75b3cSYann Gautier 	.binary_type = BL33_BINARY_TYPE,
70c9d75b3cSYann Gautier };
71c9d75b3cSYann Gautier 
72c9d75b3cSYann Gautier enum {
73c9d75b3cSYann Gautier 	IMG_IDX_BL33,
74c9d75b3cSYann Gautier 	IMG_IDX_NUM
75c9d75b3cSYann Gautier };
76c9d75b3cSYann Gautier 
77c9d75b3cSYann Gautier static struct stm32image_device_info stm32image_dev_info_spec = {
78c9d75b3cSYann Gautier 	.lba_size = MMC_BLOCK_SIZE,
79c9d75b3cSYann Gautier 	.part_info[IMG_IDX_BL33] = {
80c9d75b3cSYann Gautier 		.name = BL33_IMAGE_NAME,
81c9d75b3cSYann Gautier 		.binary_type = BL33_BINARY_TYPE,
82c9d75b3cSYann Gautier 	},
83c9d75b3cSYann Gautier };
84c9d75b3cSYann Gautier 
85c9d75b3cSYann Gautier static io_block_spec_t stm32image_block_spec = {
86c9d75b3cSYann Gautier 	.offset = 0,
87c9d75b3cSYann Gautier 	.length = 0,
88c9d75b3cSYann Gautier };
89c9d75b3cSYann Gautier 
90c9d75b3cSYann Gautier static const io_dev_connector_t *stm32image_dev_con;
91c9d75b3cSYann Gautier 
92c9d75b3cSYann Gautier static int open_dummy(const uintptr_t spec);
93c9d75b3cSYann Gautier static int open_image(const uintptr_t spec);
94c9d75b3cSYann Gautier static int open_storage(const uintptr_t spec);
95c9d75b3cSYann Gautier 
96c9d75b3cSYann Gautier struct plat_io_policy {
97c9d75b3cSYann Gautier 	uintptr_t *dev_handle;
98c9d75b3cSYann Gautier 	uintptr_t image_spec;
99c9d75b3cSYann Gautier 	int (*check)(const uintptr_t spec);
100c9d75b3cSYann Gautier };
101c9d75b3cSYann Gautier 
102c9d75b3cSYann Gautier static const struct plat_io_policy policies[] = {
103c9d75b3cSYann Gautier 	[BL2_IMAGE_ID] = {
104c9d75b3cSYann Gautier 		.dev_handle = &dummy_dev_handle,
105c9d75b3cSYann Gautier 		.image_spec = (uintptr_t)&bl2_block_spec,
106c9d75b3cSYann Gautier 		.check = open_dummy
107c9d75b3cSYann Gautier 	},
108c9d75b3cSYann Gautier 	[BL32_IMAGE_ID] = {
109c9d75b3cSYann Gautier 		.dev_handle = &dummy_dev_handle,
110c9d75b3cSYann Gautier 		.image_spec = (uintptr_t)&bl32_block_spec,
111c9d75b3cSYann Gautier 		.check = open_dummy
112c9d75b3cSYann Gautier 	},
113c9d75b3cSYann Gautier 	[BL33_IMAGE_ID] = {
114c9d75b3cSYann Gautier 		.dev_handle = &image_dev_handle,
115c9d75b3cSYann Gautier 		.image_spec = (uintptr_t)&bl33_partition_spec,
116c9d75b3cSYann Gautier 		.check = open_image
117c9d75b3cSYann Gautier 	},
118c9d75b3cSYann Gautier 	[GPT_IMAGE_ID] = {
119c9d75b3cSYann Gautier 		.dev_handle = &storage_dev_handle,
120c9d75b3cSYann Gautier 		.image_spec = (uintptr_t)&gpt_block_spec,
121c9d75b3cSYann Gautier 		.check = open_storage
122c9d75b3cSYann Gautier 	},
123c9d75b3cSYann Gautier 	[STM32_IMAGE_ID] = {
124c9d75b3cSYann Gautier 		.dev_handle = &storage_dev_handle,
125c9d75b3cSYann Gautier 		.image_spec = (uintptr_t)&stm32image_block_spec,
126c9d75b3cSYann Gautier 		.check = open_storage
127c9d75b3cSYann Gautier 	}
128c9d75b3cSYann Gautier };
129c9d75b3cSYann Gautier 
130c9d75b3cSYann Gautier static int open_dummy(const uintptr_t spec)
131c9d75b3cSYann Gautier {
132c9d75b3cSYann Gautier 	return io_dev_init(dummy_dev_handle, 0);
133c9d75b3cSYann Gautier }
134c9d75b3cSYann Gautier 
135c9d75b3cSYann Gautier static int open_image(const uintptr_t spec)
136c9d75b3cSYann Gautier {
137c9d75b3cSYann Gautier 	return io_dev_init(image_dev_handle, 0);
138c9d75b3cSYann Gautier }
139c9d75b3cSYann Gautier 
140c9d75b3cSYann Gautier static int open_storage(const uintptr_t spec)
141c9d75b3cSYann Gautier {
142c9d75b3cSYann Gautier 	return io_dev_init(storage_dev_handle, 0);
143c9d75b3cSYann Gautier }
144c9d75b3cSYann Gautier 
145c9d75b3cSYann Gautier static void print_boot_device(boot_api_context_t *boot_context)
146c9d75b3cSYann Gautier {
147c9d75b3cSYann Gautier 	switch (boot_context->boot_interface_selected) {
148c9d75b3cSYann Gautier 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
149c9d75b3cSYann Gautier 		INFO("Using SDMMC\n");
150c9d75b3cSYann Gautier 		break;
151c9d75b3cSYann Gautier 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
152c9d75b3cSYann Gautier 		INFO("Using EMMC\n");
153c9d75b3cSYann Gautier 		break;
154c9d75b3cSYann Gautier 	default:
155c9d75b3cSYann Gautier 		ERROR("Boot interface not found\n");
156c9d75b3cSYann Gautier 		panic();
157c9d75b3cSYann Gautier 		break;
158c9d75b3cSYann Gautier 	}
159c9d75b3cSYann Gautier 
160c9d75b3cSYann Gautier 	if (boot_context->boot_interface_instance != 0U) {
161c9d75b3cSYann Gautier 		INFO("  Instance %d\n", boot_context->boot_interface_instance);
162c9d75b3cSYann Gautier 	}
163c9d75b3cSYann Gautier }
164c9d75b3cSYann Gautier 
165*0b1aa772SYann Gautier static void boot_mmc(enum mmc_device_type mmc_dev_type,
166*0b1aa772SYann Gautier 		     uint16_t boot_interface_instance)
167c9d75b3cSYann Gautier {
168c9d75b3cSYann Gautier 	int io_result __unused;
169c9d75b3cSYann Gautier 	uint8_t idx;
170c9d75b3cSYann Gautier 	struct stm32image_part_info *part;
171c9d75b3cSYann Gautier 	struct stm32_sdmmc2_params params;
172c9d75b3cSYann Gautier 	struct mmc_device_info device_info;
173c9d75b3cSYann Gautier 	const partition_entry_t *entry;
174c9d75b3cSYann Gautier 
17542beea8dSYann Gautier 	zeromem(&device_info, sizeof(struct mmc_device_info));
17642beea8dSYann Gautier 	zeromem(&params, sizeof(struct stm32_sdmmc2_params));
177c9d75b3cSYann Gautier 
178*0b1aa772SYann Gautier 	device_info.mmc_dev_type = mmc_dev_type;
179c9d75b3cSYann Gautier 
180*0b1aa772SYann Gautier 	switch (boot_interface_instance) {
181c9d75b3cSYann Gautier 	case 1:
1823f9c9784SYann Gautier 		params.reg_base = STM32MP_SDMMC1_BASE;
183c9d75b3cSYann Gautier 		break;
184c9d75b3cSYann Gautier 	case 2:
1853f9c9784SYann Gautier 		params.reg_base = STM32MP_SDMMC2_BASE;
186c9d75b3cSYann Gautier 		break;
187c9d75b3cSYann Gautier 	case 3:
1883f9c9784SYann Gautier 		params.reg_base = STM32MP_SDMMC3_BASE;
189c9d75b3cSYann Gautier 		break;
190c9d75b3cSYann Gautier 	default:
191c9d75b3cSYann Gautier 		WARN("SDMMC instance not found, using default\n");
192*0b1aa772SYann Gautier 		if (mmc_dev_type == MMC_IS_SD) {
193*0b1aa772SYann Gautier 			params.reg_base = STM32MP_SDMMC1_BASE;
194*0b1aa772SYann Gautier 		} else {
195*0b1aa772SYann Gautier 			params.reg_base = STM32MP_SDMMC2_BASE;
196*0b1aa772SYann Gautier 		}
197c9d75b3cSYann Gautier 		break;
198c9d75b3cSYann Gautier 	}
199c9d75b3cSYann Gautier 
200c9d75b3cSYann Gautier 	params.device_info = &device_info;
201c9d75b3cSYann Gautier 	if (stm32_sdmmc2_mmc_init(&params) != 0) {
202*0b1aa772SYann Gautier 		ERROR("SDMMC%u init failed\n", boot_interface_instance);
203c9d75b3cSYann Gautier 		panic();
204c9d75b3cSYann Gautier 	}
205c9d75b3cSYann Gautier 
206c9d75b3cSYann Gautier 	/* Open MMC as a block device to read GPT table */
207c9d75b3cSYann Gautier 	io_result = register_io_dev_block(&mmc_dev_con);
208c9d75b3cSYann Gautier 	if (io_result != 0) {
209c9d75b3cSYann Gautier 		panic();
210c9d75b3cSYann Gautier 	}
211c9d75b3cSYann Gautier 
212*0b1aa772SYann Gautier 	io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_block_dev_spec,
213c9d75b3cSYann Gautier 				&storage_dev_handle);
214c9d75b3cSYann Gautier 	assert(io_result == 0);
215c9d75b3cSYann Gautier 
216c9d75b3cSYann Gautier 	partition_init(GPT_IMAGE_ID);
217c9d75b3cSYann Gautier 
218c9d75b3cSYann Gautier 	io_result = io_dev_close(storage_dev_handle);
219c9d75b3cSYann Gautier 	assert(io_result == 0);
220c9d75b3cSYann Gautier 
221c9d75b3cSYann Gautier 	stm32image_dev_info_spec.device_size =
222c9d75b3cSYann Gautier 		stm32_sdmmc2_mmc_get_device_size();
223c9d75b3cSYann Gautier 
224c9d75b3cSYann Gautier 	for (idx = 0U; idx < IMG_IDX_NUM; idx++) {
225c9d75b3cSYann Gautier 		part = &stm32image_dev_info_spec.part_info[idx];
226c9d75b3cSYann Gautier 		entry = get_partition_entry(part->name);
227c9d75b3cSYann Gautier 		if (entry == NULL) {
228*0b1aa772SYann Gautier 			ERROR("Partition %s not found\n", part->name);
229c9d75b3cSYann Gautier 			panic();
230c9d75b3cSYann Gautier 		}
231c9d75b3cSYann Gautier 
232c9d75b3cSYann Gautier 		part->part_offset = entry->start;
233c9d75b3cSYann Gautier 		part->bkp_offset = 0U;
234c9d75b3cSYann Gautier 	}
235c9d75b3cSYann Gautier 
236c9d75b3cSYann Gautier 	/*
237c9d75b3cSYann Gautier 	 * Re-open MMC with io_mmc, for better perfs compared to
238c9d75b3cSYann Gautier 	 * io_block.
239c9d75b3cSYann Gautier 	 */
240c9d75b3cSYann Gautier 	io_result = register_io_dev_mmc(&mmc_dev_con);
241c9d75b3cSYann Gautier 	assert(io_result == 0);
242c9d75b3cSYann Gautier 
243c9d75b3cSYann Gautier 	io_result = io_dev_open(mmc_dev_con, 0, &storage_dev_handle);
244c9d75b3cSYann Gautier 	assert(io_result == 0);
245c9d75b3cSYann Gautier 
246c9d75b3cSYann Gautier 	io_result = register_io_dev_stm32image(&stm32image_dev_con);
247c9d75b3cSYann Gautier 	assert(io_result == 0);
248c9d75b3cSYann Gautier 
249c9d75b3cSYann Gautier 	io_result = io_dev_open(stm32image_dev_con,
250c9d75b3cSYann Gautier 				(uintptr_t)&stm32image_dev_info_spec,
251c9d75b3cSYann Gautier 				&image_dev_handle);
252c9d75b3cSYann Gautier 	assert(io_result == 0);
253*0b1aa772SYann Gautier }
254*0b1aa772SYann Gautier 
255*0b1aa772SYann Gautier void stm32mp_io_setup(void)
256*0b1aa772SYann Gautier {
257*0b1aa772SYann Gautier 	int io_result __unused;
258*0b1aa772SYann Gautier 	boot_api_context_t *boot_context =
259*0b1aa772SYann Gautier 		(boot_api_context_t *)stm32mp_get_boot_ctx_address();
260*0b1aa772SYann Gautier 
261*0b1aa772SYann Gautier 	print_boot_device(boot_context);
262*0b1aa772SYann Gautier 
263*0b1aa772SYann Gautier 	if ((boot_context->boot_partition_used_toboot == 1U) ||
264*0b1aa772SYann Gautier 	    (boot_context->boot_partition_used_toboot == 2U)) {
265*0b1aa772SYann Gautier 		INFO("Boot used partition fsbl%d\n",
266*0b1aa772SYann Gautier 		     boot_context->boot_partition_used_toboot);
267*0b1aa772SYann Gautier 	}
268*0b1aa772SYann Gautier 
269*0b1aa772SYann Gautier 	io_result = register_io_dev_dummy(&dummy_dev_con);
270*0b1aa772SYann Gautier 	assert(io_result == 0);
271*0b1aa772SYann Gautier 
272*0b1aa772SYann Gautier 	io_result = io_dev_open(dummy_dev_con, dummy_dev_spec,
273*0b1aa772SYann Gautier 				&dummy_dev_handle);
274*0b1aa772SYann Gautier 	assert(io_result == 0);
275*0b1aa772SYann Gautier 
276*0b1aa772SYann Gautier 	switch (boot_context->boot_interface_selected) {
277*0b1aa772SYann Gautier 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
278*0b1aa772SYann Gautier 		dmbsy();
279*0b1aa772SYann Gautier 		boot_mmc(MMC_IS_SD, boot_context->boot_interface_instance);
280*0b1aa772SYann Gautier 		break;
281*0b1aa772SYann Gautier 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
282*0b1aa772SYann Gautier 		dmbsy();
283*0b1aa772SYann Gautier 		boot_mmc(MMC_IS_EMMC, boot_context->boot_interface_instance);
284c9d75b3cSYann Gautier 		break;
285c9d75b3cSYann Gautier 
286c9d75b3cSYann Gautier 	default:
287c9d75b3cSYann Gautier 		ERROR("Boot interface %d not supported\n",
288c9d75b3cSYann Gautier 		      boot_context->boot_interface_selected);
289c9d75b3cSYann Gautier 		break;
290c9d75b3cSYann Gautier 	}
291c9d75b3cSYann Gautier }
292c9d75b3cSYann Gautier 
293c9d75b3cSYann Gautier /*
294c9d75b3cSYann Gautier  * Return an IO device handle and specification which can be used to access
295c9d75b3cSYann Gautier  * an image. Use this to enforce platform load policy.
296c9d75b3cSYann Gautier  */
297c9d75b3cSYann Gautier int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
298c9d75b3cSYann Gautier 			  uintptr_t *image_spec)
299c9d75b3cSYann Gautier {
300c9d75b3cSYann Gautier 	int rc;
301c9d75b3cSYann Gautier 	const struct plat_io_policy *policy;
302c9d75b3cSYann Gautier 
303c9d75b3cSYann Gautier 	assert(image_id < ARRAY_SIZE(policies));
304c9d75b3cSYann Gautier 
305c9d75b3cSYann Gautier 	policy = &policies[image_id];
306c9d75b3cSYann Gautier 	rc = policy->check(policy->image_spec);
307c9d75b3cSYann Gautier 	if (rc == 0) {
308c9d75b3cSYann Gautier 		*image_spec = policy->image_spec;
309c9d75b3cSYann Gautier 		*dev_handle = *(policy->dev_handle);
310c9d75b3cSYann Gautier 	}
311c9d75b3cSYann Gautier 
312c9d75b3cSYann Gautier 	return rc;
313c9d75b3cSYann Gautier }
314