1 /* 2 * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <platform_def.h> 10 11 #include <common/debug.h> 12 #include <lib/xlat_tables/xlat_tables_v2.h> 13 14 #include "uniphier.h" 15 16 struct uniphier_reg_region { 17 uintptr_t base; 18 size_t size; 19 }; 20 21 static const struct uniphier_reg_region uniphier_reg_region[] = { 22 [UNIPHIER_SOC_LD11] = { 23 .base = 0x50000000UL, 24 .size = 0x20000000UL, 25 }, 26 [UNIPHIER_SOC_LD20] = { 27 .base = 0x50000000UL, 28 .size = 0x20000000UL, 29 }, 30 [UNIPHIER_SOC_PXS3] = { 31 .base = 0x50000000UL, 32 .size = 0x20000000UL, 33 }, 34 }; 35 36 void uniphier_mmap_setup(unsigned int soc) 37 { 38 VERBOSE("Trusted RAM seen by this BL image: %p - %p\n", 39 (void *)BL_CODE_BASE, (void *)BL_END); 40 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, 41 round_up(BL_END, PAGE_SIZE) - BL_CODE_BASE, 42 MT_MEMORY | MT_RW | MT_SECURE); 43 44 /* remap the code section */ 45 VERBOSE("Code region: %p - %p\n", 46 (void *)BL_CODE_BASE, (void *)BL_CODE_END); 47 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, 48 round_up(BL_CODE_END, PAGE_SIZE) - BL_CODE_BASE, 49 MT_CODE | MT_SECURE); 50 51 /* remap the coherent memory region */ 52 VERBOSE("Coherent region: %p - %p\n", 53 (void *)BL_COHERENT_RAM_BASE, (void *)BL_COHERENT_RAM_END); 54 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, 55 BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, 56 MT_DEVICE | MT_RW | MT_SECURE); 57 58 /* register region */ 59 assert(soc < ARRAY_SIZE(uniphier_reg_region)); 60 mmap_add_region(uniphier_reg_region[soc].base, 61 uniphier_reg_region[soc].base, 62 uniphier_reg_region[soc].size, 63 MT_DEVICE | MT_RW | MT_SECURE); 64 65 init_xlat_tables(); 66 } 67