1*d8e919c7SMasahiro Yamada /* 2*d8e919c7SMasahiro Yamada * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*d8e919c7SMasahiro Yamada * 4*d8e919c7SMasahiro Yamada * SPDX-License-Identifier: BSD-3-Clause 5*d8e919c7SMasahiro Yamada */ 6*d8e919c7SMasahiro Yamada 7*d8e919c7SMasahiro Yamada #include <assert.h> 8*d8e919c7SMasahiro Yamada #include <gicv3.h> 9*d8e919c7SMasahiro Yamada #include <platform.h> 10*d8e919c7SMasahiro Yamada #include <platform_def.h> 11*d8e919c7SMasahiro Yamada 12*d8e919c7SMasahiro Yamada #include "uniphier.h" 13*d8e919c7SMasahiro Yamada 14*d8e919c7SMasahiro Yamada static uintptr_t uniphier_rdistif_base_addrs[PLATFORM_CORE_COUNT]; 15*d8e919c7SMasahiro Yamada 16*d8e919c7SMasahiro Yamada static const unsigned int g0_interrupt_array[] = { 17*d8e919c7SMasahiro Yamada 8, /* SGI0 */ 18*d8e919c7SMasahiro Yamada 14, /* SGI6 */ 19*d8e919c7SMasahiro Yamada }; 20*d8e919c7SMasahiro Yamada 21*d8e919c7SMasahiro Yamada static const unsigned int g1s_interrupt_array[] = { 22*d8e919c7SMasahiro Yamada 29, /* Timer */ 23*d8e919c7SMasahiro Yamada 9, /* SGI1 */ 24*d8e919c7SMasahiro Yamada 10, /* SGI2 */ 25*d8e919c7SMasahiro Yamada 11, /* SGI3 */ 26*d8e919c7SMasahiro Yamada 12, /* SGI4 */ 27*d8e919c7SMasahiro Yamada 13, /* SGI5 */ 28*d8e919c7SMasahiro Yamada 15, /* SGI7 */ 29*d8e919c7SMasahiro Yamada }; 30*d8e919c7SMasahiro Yamada 31*d8e919c7SMasahiro Yamada static unsigned int uniphier_mpidr_to_core_pos(u_register_t mpidr) 32*d8e919c7SMasahiro Yamada { 33*d8e919c7SMasahiro Yamada return plat_core_pos_by_mpidr(mpidr); 34*d8e919c7SMasahiro Yamada } 35*d8e919c7SMasahiro Yamada 36*d8e919c7SMasahiro Yamada static const struct gicv3_driver_data uniphier_gic_driver_data[] = { 37*d8e919c7SMasahiro Yamada [UNIPHIER_SOC_LD11] = { 38*d8e919c7SMasahiro Yamada .gicd_base = 0x5fe00000, 39*d8e919c7SMasahiro Yamada .gicr_base = 0x5fe40000, 40*d8e919c7SMasahiro Yamada .g0_interrupt_num = ARRAY_SIZE(g0_interrupt_array), 41*d8e919c7SMasahiro Yamada .g1s_interrupt_num = ARRAY_SIZE(g1s_interrupt_array), 42*d8e919c7SMasahiro Yamada .g0_interrupt_array = g0_interrupt_array, 43*d8e919c7SMasahiro Yamada .g1s_interrupt_array = g1s_interrupt_array, 44*d8e919c7SMasahiro Yamada .rdistif_num = PLATFORM_CORE_COUNT, 45*d8e919c7SMasahiro Yamada .rdistif_base_addrs = uniphier_rdistif_base_addrs, 46*d8e919c7SMasahiro Yamada .mpidr_to_core_pos = uniphier_mpidr_to_core_pos, 47*d8e919c7SMasahiro Yamada }, 48*d8e919c7SMasahiro Yamada [UNIPHIER_SOC_LD20] = { 49*d8e919c7SMasahiro Yamada .gicd_base = 0x5fe00000, 50*d8e919c7SMasahiro Yamada .gicr_base = 0x5fe80000, 51*d8e919c7SMasahiro Yamada .g0_interrupt_num = ARRAY_SIZE(g0_interrupt_array), 52*d8e919c7SMasahiro Yamada .g1s_interrupt_num = ARRAY_SIZE(g1s_interrupt_array), 53*d8e919c7SMasahiro Yamada .g0_interrupt_array = g0_interrupt_array, 54*d8e919c7SMasahiro Yamada .g1s_interrupt_array = g1s_interrupt_array, 55*d8e919c7SMasahiro Yamada .rdistif_num = PLATFORM_CORE_COUNT, 56*d8e919c7SMasahiro Yamada .rdistif_base_addrs = uniphier_rdistif_base_addrs, 57*d8e919c7SMasahiro Yamada .mpidr_to_core_pos = uniphier_mpidr_to_core_pos, 58*d8e919c7SMasahiro Yamada }, 59*d8e919c7SMasahiro Yamada [UNIPHIER_SOC_PXS3] = { 60*d8e919c7SMasahiro Yamada .gicd_base = 0x5fe00000, 61*d8e919c7SMasahiro Yamada .gicr_base = 0x5fe80000, 62*d8e919c7SMasahiro Yamada .g0_interrupt_num = ARRAY_SIZE(g0_interrupt_array), 63*d8e919c7SMasahiro Yamada .g1s_interrupt_num = ARRAY_SIZE(g1s_interrupt_array), 64*d8e919c7SMasahiro Yamada .g0_interrupt_array = g0_interrupt_array, 65*d8e919c7SMasahiro Yamada .g1s_interrupt_array = g1s_interrupt_array, 66*d8e919c7SMasahiro Yamada .rdistif_num = PLATFORM_CORE_COUNT, 67*d8e919c7SMasahiro Yamada .rdistif_base_addrs = uniphier_rdistif_base_addrs, 68*d8e919c7SMasahiro Yamada .mpidr_to_core_pos = uniphier_mpidr_to_core_pos, 69*d8e919c7SMasahiro Yamada }, 70*d8e919c7SMasahiro Yamada }; 71*d8e919c7SMasahiro Yamada 72*d8e919c7SMasahiro Yamada void uniphier_gic_driver_init(unsigned int soc) 73*d8e919c7SMasahiro Yamada { 74*d8e919c7SMasahiro Yamada assert(soc < ARRAY_SIZE(uniphier_gic_driver_data)); 75*d8e919c7SMasahiro Yamada 76*d8e919c7SMasahiro Yamada gicv3_driver_init(&uniphier_gic_driver_data[soc]); 77*d8e919c7SMasahiro Yamada } 78*d8e919c7SMasahiro Yamada 79*d8e919c7SMasahiro Yamada void uniphier_gic_init(void) 80*d8e919c7SMasahiro Yamada { 81*d8e919c7SMasahiro Yamada gicv3_distif_init(); 82*d8e919c7SMasahiro Yamada gicv3_rdistif_init(plat_my_core_pos()); 83*d8e919c7SMasahiro Yamada gicv3_cpuif_enable(plat_my_core_pos()); 84*d8e919c7SMasahiro Yamada } 85*d8e919c7SMasahiro Yamada 86*d8e919c7SMasahiro Yamada void uniphier_gic_cpuif_enable(void) 87*d8e919c7SMasahiro Yamada { 88*d8e919c7SMasahiro Yamada gicv3_cpuif_enable(plat_my_core_pos()); 89*d8e919c7SMasahiro Yamada } 90*d8e919c7SMasahiro Yamada 91*d8e919c7SMasahiro Yamada void uniphier_gic_cpuif_disable(void) 92*d8e919c7SMasahiro Yamada { 93*d8e919c7SMasahiro Yamada gicv3_cpuif_disable(plat_my_core_pos()); 94*d8e919c7SMasahiro Yamada } 95*d8e919c7SMasahiro Yamada 96*d8e919c7SMasahiro Yamada void uniphier_gic_pcpu_init(void) 97*d8e919c7SMasahiro Yamada { 98*d8e919c7SMasahiro Yamada gicv3_rdistif_init(plat_my_core_pos()); 99*d8e919c7SMasahiro Yamada } 100