1 /* 2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <stddef.h> 8 9 #include <arch_helpers.h> 10 #include <drivers/arm/cci.h> 11 #include <lib/utils_def.h> 12 13 #include "uniphier.h" 14 15 #define UNIPHIER_CCI500_BASE 0x5FD00000 16 17 static const int uniphier_cci_map[] = {1, 0}; 18 19 static void __uniphier_cci_init(void) 20 { 21 cci_init(UNIPHIER_CCI500_BASE, uniphier_cci_map, 22 ARRAY_SIZE(uniphier_cci_map)); 23 } 24 25 static void __uniphier_cci_enable(void) 26 { 27 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 28 } 29 30 static void __uniphier_cci_disable(void) 31 { 32 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 33 } 34 35 struct uniphier_cci_ops { 36 void (*init)(void); 37 void (*enable)(void); 38 void (*disable)(void); 39 }; 40 41 static const struct uniphier_cci_ops uniphier_cci_ops_table[] = { 42 [UNIPHIER_SOC_LD11] = { 43 .init = NULL, 44 .enable = NULL, 45 .disable = NULL, 46 }, 47 [UNIPHIER_SOC_LD20] = { 48 .init = __uniphier_cci_init, 49 .enable = __uniphier_cci_enable, 50 .disable = __uniphier_cci_disable, 51 }, 52 [UNIPHIER_SOC_PXS3] = { 53 .init = NULL, 54 .enable = NULL, 55 .disable = NULL, 56 }, 57 }; 58 59 static struct uniphier_cci_ops uniphier_cci_ops; 60 61 void uniphier_cci_init(unsigned int soc) 62 { 63 uniphier_cci_ops = uniphier_cci_ops_table[soc]; 64 flush_dcache_range((uint64_t)&uniphier_cci_ops, 65 sizeof(uniphier_cci_ops)); 66 67 if (uniphier_cci_ops.init) 68 uniphier_cci_ops.init(); 69 } 70 71 void uniphier_cci_enable(void) 72 { 73 if (uniphier_cci_ops.enable) 74 uniphier_cci_ops.enable(); 75 } 76 77 void uniphier_cci_disable(void) 78 { 79 if (uniphier_cci_ops.disable) 80 uniphier_cci_ops.disable(); 81 } 82