1 /* 2 * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 10 #include <platform_def.h> 11 12 #include <arch.h> 13 #include <common/bl_common.h> 14 #include <common/debug.h> 15 #include <drivers/console.h> 16 #include <lib/mmio.h> 17 #include <lib/xlat_tables/xlat_mmu_helpers.h> 18 #include <plat/common/platform.h> 19 20 #include "uniphier.h" 21 22 static entry_point_info_t bl32_image_ep_info; 23 static entry_point_info_t bl33_image_ep_info; 24 static unsigned int uniphier_soc = UNIPHIER_SOC_UNKNOWN; 25 26 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 27 { 28 assert(sec_state_is_valid(type)); 29 return type == NON_SECURE ? &bl33_image_ep_info : &bl32_image_ep_info; 30 } 31 32 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 33 u_register_t arg2, u_register_t arg3) 34 { 35 void *from_bl2; 36 37 from_bl2 = (void *)arg0; 38 39 bl_params_node_t *bl_params = ((bl_params_t *)from_bl2)->head; 40 41 uniphier_soc = uniphier_get_soc_id(); 42 if (uniphier_soc == UNIPHIER_SOC_UNKNOWN) 43 plat_error_handler(-ENOTSUP); 44 45 uniphier_console_setup(uniphier_soc); 46 47 while (bl_params) { 48 if (bl_params->image_id == BL32_IMAGE_ID) 49 bl32_image_ep_info = *bl_params->ep_info; 50 51 if (bl_params->image_id == BL33_IMAGE_ID) 52 bl33_image_ep_info = *bl_params->ep_info; 53 54 bl_params = bl_params->next_params_info; 55 } 56 57 if (bl33_image_ep_info.pc == 0) 58 panic(); 59 } 60 61 #define UNIPHIER_SYS_CNTCTL_BASE 0x60E00000 62 63 void bl31_platform_setup(void) 64 { 65 uniphier_cci_init(uniphier_soc); 66 uniphier_cci_enable(); 67 68 /* Initialize the GIC driver, cpu and distributor interfaces */ 69 uniphier_gic_driver_init(uniphier_soc); 70 uniphier_gic_init(); 71 72 /* Enable and initialize the System level generic timer */ 73 mmio_write_32(UNIPHIER_SYS_CNTCTL_BASE + CNTCR_OFF, 74 CNTCR_FCREQ(0U) | CNTCR_EN); 75 } 76 77 void bl31_plat_arch_setup(void) 78 { 79 uniphier_mmap_setup(); 80 enable_mmu_el3(0); 81 } 82