xref: /rk3399_ARM-atf/plat/socionext/uniphier/platform.mk (revision e47ac1fd634a3934d7d3ac446190b2f4bd8a640f)
1#
2# Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7override COLD_BOOT_SINGLE_CPU	:= 1
8override ENABLE_PLAT_COMPAT	:= 0
9override ERROR_DEPRECATED	:= 1
10override LOAD_IMAGE_V2		:= 1
11override USE_COHERENT_MEM	:= 1
12override USE_TBBR_DEFS		:= 1
13
14# Cortex-A53 revision r0p4-51rel0
15# needed for LD20, unneeded for LD11, PXs3 (no ACE)
16ERRATA_A53_855873		:= 1
17
18FIP_ALIGN			:= 512
19
20ifeq ($(NEED_BL32),yes)
21$(eval $(call add_define,UNIPHIER_LOAD_BL32))
22endif
23
24PLAT_PATH		:=	plat/socionext/uniphier
25PLAT_INCLUDES		:=	-I$(PLAT_PATH)/include
26
27# IO sources for BL1, BL2
28IO_SOURCES		:=	drivers/io/io_block.c			\
29				drivers/io/io_fip.c			\
30				drivers/io/io_memmap.c			\
31				drivers/io/io_storage.c			\
32				$(PLAT_PATH)/uniphier_boot_device.c	\
33				$(PLAT_PATH)/uniphier_emmc.c		\
34				$(PLAT_PATH)/uniphier_io_storage.c	\
35				$(PLAT_PATH)/uniphier_nand.c		\
36				$(PLAT_PATH)/uniphier_usb.c
37
38# common sources for BL1, BL2, BL31
39PLAT_BL_COMMON_SOURCES	+=	drivers/console/aarch64/console.S	\
40				lib/xlat_tables_v2/aarch64/xlat_tables_arch.c \
41				lib/xlat_tables_v2/xlat_tables_internal.c \
42				$(PLAT_PATH)/uniphier_console.S		\
43				$(PLAT_PATH)/uniphier_helpers.S		\
44				$(PLAT_PATH)/uniphier_soc_info.c	\
45				$(PLAT_PATH)/uniphier_xlat_setup.c
46
47BL1_SOURCES		+=	lib/cpus/aarch64/cortex_a53.S		\
48				lib/cpus/aarch64/cortex_a72.S		\
49				$(PLAT_PATH)/uniphier_bl1_helpers.S	\
50				$(PLAT_PATH)/uniphier_bl1_setup.c	\
51				$(IO_SOURCES)
52
53BL2_SOURCES		+=	common/desc_image_load.c		\
54				$(PLAT_PATH)/uniphier_bl2_setup.c	\
55				$(PLAT_PATH)/uniphier_image_desc.c	\
56				$(PLAT_PATH)/uniphier_scp.c		\
57				$(IO_SOURCES)
58
59BL31_SOURCES		+=	drivers/arm/cci/cci.c			\
60				drivers/arm/gic/common/gic_common.c	\
61				drivers/arm/gic/v3/gicv3_helpers.c	\
62				drivers/arm/gic/v3/gicv3_main.c		\
63				lib/cpus/aarch64/cortex_a53.S		\
64				lib/cpus/aarch64/cortex_a72.S		\
65				plat/common/plat_gicv3.c		\
66				plat/common/plat_psci_common.c		\
67				$(PLAT_PATH)/uniphier_bl31_setup.c	\
68				$(PLAT_PATH)/uniphier_cci.c		\
69				$(PLAT_PATH)/uniphier_gicv3.c		\
70				$(PLAT_PATH)/uniphier_psci.c		\
71				$(PLAT_PATH)/uniphier_scp.c		\
72				$(PLAT_PATH)/uniphier_smp.S		\
73				$(PLAT_PATH)/uniphier_syscnt.c		\
74				$(PLAT_PATH)/uniphier_topology.c
75
76ifeq (${TRUSTED_BOARD_BOOT},1)
77
78include drivers/auth/mbedtls/mbedtls_crypto.mk
79include drivers/auth/mbedtls/mbedtls_x509.mk
80
81PLAT_INCLUDES		+=	-Iinclude/common/tbbr
82
83TBB_SOURCES		:=	drivers/auth/auth_mod.c			\
84				drivers/auth/crypto_mod.c		\
85				drivers/auth/img_parser_mod.c		\
86				drivers/auth/tbbr/tbbr_cot.c		\
87				plat/common/tbbr/plat_tbbr.c		\
88				$(PLAT_PATH)/uniphier_rotpk.S		\
89				$(PLAT_PATH)/uniphier_tbbr.c
90
91BL1_SOURCES		+=	$(TBB_SOURCES)
92BL2_SOURCES		+=	$(TBB_SOURCES)
93
94ROT_KEY			= $(BUILD_PLAT)/rot_key.pem
95ROTPK_HASH		= $(BUILD_PLAT)/rotpk_sha256.bin
96
97$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
98$(BUILD_PLAT)/bl1/uniphier_rotpk.o: $(ROTPK_HASH)
99$(BUILD_PLAT)/bl2/uniphier_rotpk.o: $(ROTPK_HASH)
100
101certificates: $(ROT_KEY)
102$(ROT_KEY):
103	@echo "  OPENSSL $@"
104	$(Q)openssl genrsa 2048 > $@ 2>/dev/null
105
106$(ROTPK_HASH): $(ROT_KEY)
107	@echo "  OPENSSL $@"
108	$(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
109	openssl dgst -sha256 -binary > $@ 2>/dev/null
110
111endif
112
113.PHONY: bl1_gzip
114bl1_gzip: $(BUILD_PLAT)/bl1.bin.gzip
115%.gzip: %
116	@echo " GZIP     $@"
117	$(Q)(cat $< | gzip -n -f -9 > $@) || (rm -f $@ || false)
118