1*8cd37d7bSSumit Garg /* 2*8cd37d7bSSumit Garg * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3*8cd37d7bSSumit Garg * 4*8cd37d7bSSumit Garg * SPDX-License-Identifier: BSD-3-Clause 5*8cd37d7bSSumit Garg */ 6*8cd37d7bSSumit Garg 7*8cd37d7bSSumit Garg #include <debug.h> 8*8cd37d7bSSumit Garg #include <platform_def.h> 9*8cd37d7bSSumit Garg #include <xlat_tables_v2.h> 10*8cd37d7bSSumit Garg 11*8cd37d7bSSumit Garg #define SQ_REG_REGION_BASE 0x20000000ULL 12*8cd37d7bSSumit Garg #define SQ_REG_REGION_SIZE 0x60000000ULL 13*8cd37d7bSSumit Garg 14*8cd37d7bSSumit Garg void sq_mmap_setup(uintptr_t total_base, size_t total_size, 15*8cd37d7bSSumit Garg const struct mmap_region *mmap) 16*8cd37d7bSSumit Garg { 17*8cd37d7bSSumit Garg VERBOSE("Trusted RAM seen by this BL image: %p - %p\n", 18*8cd37d7bSSumit Garg (void *)total_base, (void *)(total_base + total_size)); 19*8cd37d7bSSumit Garg mmap_add_region(total_base, total_base, 20*8cd37d7bSSumit Garg total_size, 21*8cd37d7bSSumit Garg MT_NON_CACHEABLE | MT_RW | MT_SECURE); 22*8cd37d7bSSumit Garg 23*8cd37d7bSSumit Garg /* remap the code section */ 24*8cd37d7bSSumit Garg VERBOSE("Code region: %p - %p\n", 25*8cd37d7bSSumit Garg (void *)BL_CODE_BASE, (void *)BL_CODE_END); 26*8cd37d7bSSumit Garg mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, 27*8cd37d7bSSumit Garg round_up(BL_CODE_END, PAGE_SIZE) - BL_CODE_BASE, 28*8cd37d7bSSumit Garg MT_NON_CACHEABLE | MT_RO | MT_SECURE); 29*8cd37d7bSSumit Garg 30*8cd37d7bSSumit Garg /* Re-map the read-only data section */ 31*8cd37d7bSSumit Garg VERBOSE("Read-only data region: %p - %p\n", 32*8cd37d7bSSumit Garg (void *)BL_RO_DATA_BASE, (void *)BL_RO_DATA_END); 33*8cd37d7bSSumit Garg mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE, 34*8cd37d7bSSumit Garg round_up(BL_RO_DATA_END, PAGE_SIZE) - BL_RO_DATA_BASE, 35*8cd37d7bSSumit Garg (MT_NON_CACHEABLE | MT_RO | MT_EXECUTE_NEVER | 36*8cd37d7bSSumit Garg MT_SECURE)); 37*8cd37d7bSSumit Garg 38*8cd37d7bSSumit Garg /* remap the coherent memory region */ 39*8cd37d7bSSumit Garg VERBOSE("Coherent region: %p - %p\n", 40*8cd37d7bSSumit Garg (void *)BL_COHERENT_RAM_BASE, (void *)BL_COHERENT_RAM_END); 41*8cd37d7bSSumit Garg mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, 42*8cd37d7bSSumit Garg BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, 43*8cd37d7bSSumit Garg MT_DEVICE | MT_RW | MT_SECURE); 44*8cd37d7bSSumit Garg 45*8cd37d7bSSumit Garg /* register region */ 46*8cd37d7bSSumit Garg mmap_add_region(SQ_REG_REGION_BASE, SQ_REG_REGION_BASE, 47*8cd37d7bSSumit Garg SQ_REG_REGION_SIZE, 48*8cd37d7bSSumit Garg MT_DEVICE | MT_RW | MT_SECURE); 49*8cd37d7bSSumit Garg 50*8cd37d7bSSumit Garg /* additional regions if needed */ 51*8cd37d7bSSumit Garg if (mmap) 52*8cd37d7bSSumit Garg mmap_add(mmap); 53*8cd37d7bSSumit Garg 54*8cd37d7bSSumit Garg init_xlat_tables(); 55*8cd37d7bSSumit Garg } 56