18cd37d7bSSumit Garg /* 28cd37d7bSSumit Garg * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 38cd37d7bSSumit Garg * 48cd37d7bSSumit Garg * SPDX-License-Identifier: BSD-3-Clause 58cd37d7bSSumit Garg */ 68cd37d7bSSumit Garg 78cd37d7bSSumit Garg #include <platform_def.h> 8*09d40e0eSAntonio Nino Diaz 9*09d40e0eSAntonio Nino Diaz #include <common/debug.h> 10*09d40e0eSAntonio Nino Diaz #include <lib/xlat_tables/xlat_tables_v2.h> 118cd37d7bSSumit Garg 128cd37d7bSSumit Garg #define SQ_REG_REGION_BASE 0x20000000ULL 138cd37d7bSSumit Garg #define SQ_REG_REGION_SIZE 0x60000000ULL 148cd37d7bSSumit Garg 158cd37d7bSSumit Garg void sq_mmap_setup(uintptr_t total_base, size_t total_size, 168cd37d7bSSumit Garg const struct mmap_region *mmap) 178cd37d7bSSumit Garg { 188cd37d7bSSumit Garg VERBOSE("Trusted RAM seen by this BL image: %p - %p\n", 198cd37d7bSSumit Garg (void *)total_base, (void *)(total_base + total_size)); 208cd37d7bSSumit Garg mmap_add_region(total_base, total_base, 218cd37d7bSSumit Garg total_size, 228cd37d7bSSumit Garg MT_NON_CACHEABLE | MT_RW | MT_SECURE); 238cd37d7bSSumit Garg 248cd37d7bSSumit Garg /* remap the code section */ 258cd37d7bSSumit Garg VERBOSE("Code region: %p - %p\n", 268cd37d7bSSumit Garg (void *)BL_CODE_BASE, (void *)BL_CODE_END); 278cd37d7bSSumit Garg mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, 288cd37d7bSSumit Garg round_up(BL_CODE_END, PAGE_SIZE) - BL_CODE_BASE, 298cd37d7bSSumit Garg MT_NON_CACHEABLE | MT_RO | MT_SECURE); 308cd37d7bSSumit Garg 318cd37d7bSSumit Garg /* Re-map the read-only data section */ 328cd37d7bSSumit Garg VERBOSE("Read-only data region: %p - %p\n", 338cd37d7bSSumit Garg (void *)BL_RO_DATA_BASE, (void *)BL_RO_DATA_END); 348cd37d7bSSumit Garg mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE, 358cd37d7bSSumit Garg round_up(BL_RO_DATA_END, PAGE_SIZE) - BL_RO_DATA_BASE, 368cd37d7bSSumit Garg (MT_NON_CACHEABLE | MT_RO | MT_EXECUTE_NEVER | 378cd37d7bSSumit Garg MT_SECURE)); 388cd37d7bSSumit Garg 398cd37d7bSSumit Garg /* remap the coherent memory region */ 408cd37d7bSSumit Garg VERBOSE("Coherent region: %p - %p\n", 418cd37d7bSSumit Garg (void *)BL_COHERENT_RAM_BASE, (void *)BL_COHERENT_RAM_END); 428cd37d7bSSumit Garg mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, 438cd37d7bSSumit Garg BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, 448cd37d7bSSumit Garg MT_DEVICE | MT_RW | MT_SECURE); 458cd37d7bSSumit Garg 468cd37d7bSSumit Garg /* register region */ 478cd37d7bSSumit Garg mmap_add_region(SQ_REG_REGION_BASE, SQ_REG_REGION_BASE, 488cd37d7bSSumit Garg SQ_REG_REGION_SIZE, 498cd37d7bSSumit Garg MT_DEVICE | MT_RW | MT_SECURE); 508cd37d7bSSumit Garg 518cd37d7bSSumit Garg /* additional regions if needed */ 528cd37d7bSSumit Garg if (mmap) 538cd37d7bSSumit Garg mmap_add(mmap); 548cd37d7bSSumit Garg 558cd37d7bSSumit Garg init_xlat_tables(); 568cd37d7bSSumit Garg } 57