1434454a2SArd Biesheuvel /* 2*aeaa225cSPaul Beesley * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3434454a2SArd Biesheuvel * 4434454a2SArd Biesheuvel * SPDX-License-Identifier: BSD-3-Clause 5434454a2SArd Biesheuvel */ 6434454a2SArd Biesheuvel 7434454a2SArd Biesheuvel #include <assert.h> 8434454a2SArd Biesheuvel 9434454a2SArd Biesheuvel #include <platform_def.h> 10434454a2SArd Biesheuvel 11434454a2SArd Biesheuvel #include <bl31/ehf.h> 12434454a2SArd Biesheuvel #include <lib/xlat_tables/xlat_tables_v2.h> 13*aeaa225cSPaul Beesley #include <services/spm_mm_partition.h> 14434454a2SArd Biesheuvel 15434454a2SArd Biesheuvel static const mmap_region_t plat_arm_secure_partition_mmap[] = { 16434454a2SArd Biesheuvel PLAT_SQ_FLASH_MMAP, 17434454a2SArd Biesheuvel PLAT_SQ_UART1_MMAP, 18434454a2SArd Biesheuvel PLAT_SQ_PERIPH_MMAP, 19434454a2SArd Biesheuvel PLAT_SQ_SP_IMAGE_MMAP, 20434454a2SArd Biesheuvel PLAT_SP_IMAGE_NS_BUF_MMAP, 21434454a2SArd Biesheuvel PLAT_SQ_SP_IMAGE_RW_MMAP, 22434454a2SArd Biesheuvel PLAT_SPM_SPM_BUF_EL0_MMAP, 23434454a2SArd Biesheuvel {0} 24434454a2SArd Biesheuvel }; 25434454a2SArd Biesheuvel 26434454a2SArd Biesheuvel /* 27434454a2SArd Biesheuvel * Boot information passed to a secure partition during initialisation. Linear 28434454a2SArd Biesheuvel * indices in MP information will be filled at runtime. 29434454a2SArd Biesheuvel */ 30*aeaa225cSPaul Beesley static spm_mm_mp_info_t sp_mp_info[] = { 31434454a2SArd Biesheuvel {0x80000000, 0}, {0x80000001, 0}, {0x80000100, 0}, {0x80000101, 0}, 32434454a2SArd Biesheuvel {0x80000200, 0}, {0x80000201, 0}, {0x80000300, 0}, {0x80000301, 0}, 33434454a2SArd Biesheuvel {0x80000400, 0}, {0x80000401, 0}, {0x80000500, 0}, {0x80000501, 0}, 34434454a2SArd Biesheuvel {0x80000600, 0}, {0x80000601, 0}, {0x80000700, 0}, {0x80000701, 0}, 35434454a2SArd Biesheuvel {0x80000800, 0}, {0x80000801, 0}, {0x80000900, 0}, {0x80000901, 0}, 36434454a2SArd Biesheuvel {0x80000a00, 0}, {0x80000a01, 0}, {0x80000b00, 0}, {0x80000b01, 0}, 37434454a2SArd Biesheuvel }; 38434454a2SArd Biesheuvel 39*aeaa225cSPaul Beesley const spm_mm_boot_info_t plat_arm_secure_partition_boot_info = { 40434454a2SArd Biesheuvel .h.type = PARAM_SP_IMAGE_BOOT_INFO, 41434454a2SArd Biesheuvel .h.version = VERSION_1, 42*aeaa225cSPaul Beesley .h.size = sizeof(spm_mm_boot_info_t), 43434454a2SArd Biesheuvel .h.attr = 0, 44434454a2SArd Biesheuvel .sp_mem_base = BL32_BASE, 45434454a2SArd Biesheuvel .sp_mem_limit = BL32_LIMIT, 46434454a2SArd Biesheuvel .sp_image_base = BL32_BASE, 47434454a2SArd Biesheuvel .sp_stack_base = PLAT_SP_IMAGE_STACK_BASE, 48434454a2SArd Biesheuvel .sp_heap_base = PLAT_SQ_SP_HEAP_BASE, 49434454a2SArd Biesheuvel .sp_ns_comm_buf_base = PLAT_SP_IMAGE_NS_BUF_BASE, 50434454a2SArd Biesheuvel .sp_shared_buf_base = PLAT_SPM_BUF_BASE, 51434454a2SArd Biesheuvel .sp_image_size = PLAT_SQ_SP_IMAGE_SIZE, 52434454a2SArd Biesheuvel .sp_pcpu_stack_size = PLAT_SP_IMAGE_STACK_PCPU_SIZE, 53434454a2SArd Biesheuvel .sp_heap_size = PLAT_SQ_SP_HEAP_SIZE, 54434454a2SArd Biesheuvel .sp_ns_comm_buf_size = PLAT_SP_IMAGE_NS_BUF_SIZE, 55434454a2SArd Biesheuvel .sp_shared_buf_size = PLAT_SPM_BUF_SIZE, 56434454a2SArd Biesheuvel .num_sp_mem_regions = PLAT_SP_IMAGE_NUM_MEM_REGIONS, 57434454a2SArd Biesheuvel .num_cpus = PLATFORM_CORE_COUNT, 58434454a2SArd Biesheuvel .mp_info = sp_mp_info, 59434454a2SArd Biesheuvel }; 60434454a2SArd Biesheuvel 61434454a2SArd Biesheuvel const struct mmap_region *plat_get_secure_partition_mmap(void *cookie) 62434454a2SArd Biesheuvel { 63434454a2SArd Biesheuvel return plat_arm_secure_partition_mmap; 64434454a2SArd Biesheuvel } 65434454a2SArd Biesheuvel 66*aeaa225cSPaul Beesley const struct spm_mm_boot_info *plat_get_secure_partition_boot_info( 67434454a2SArd Biesheuvel void *cookie) 68434454a2SArd Biesheuvel { 69434454a2SArd Biesheuvel return &plat_arm_secure_partition_boot_info; 70434454a2SArd Biesheuvel } 71434454a2SArd Biesheuvel 72434454a2SArd Biesheuvel static ehf_pri_desc_t sq_exceptions[] = { 73434454a2SArd Biesheuvel EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SP_PRI), 74434454a2SArd Biesheuvel }; 75434454a2SArd Biesheuvel EHF_REGISTER_PRIORITIES(sq_exceptions, ARRAY_SIZE(sq_exceptions), PLAT_PRI_BITS); 76