1*0eb275c9SSumit Garg /* 2*0eb275c9SSumit Garg * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3*0eb275c9SSumit Garg * 4*0eb275c9SSumit Garg * SPDX-License-Identifier: BSD-3-Clause 5*0eb275c9SSumit Garg */ 6*0eb275c9SSumit Garg 7*0eb275c9SSumit Garg #include <arch.h> 8*0eb275c9SSumit Garg #include <arch_helpers.h> 9*0eb275c9SSumit Garg #include <ccn.h> 10*0eb275c9SSumit Garg #include <platform_def.h> 11*0eb275c9SSumit Garg 12*0eb275c9SSumit Garg static const unsigned char master_to_rn_id_map[] = { 13*0eb275c9SSumit Garg PLAT_SQ_CLUSTER_TO_CCN_ID_MAP 14*0eb275c9SSumit Garg }; 15*0eb275c9SSumit Garg 16*0eb275c9SSumit Garg static const ccn_desc_t sq_ccn_desc = { 17*0eb275c9SSumit Garg .periphbase = PLAT_SQ_CCN_BASE, 18*0eb275c9SSumit Garg .num_masters = ARRAY_SIZE(master_to_rn_id_map), 19*0eb275c9SSumit Garg .master_to_rn_id_map = master_to_rn_id_map 20*0eb275c9SSumit Garg }; 21*0eb275c9SSumit Garg 22*0eb275c9SSumit Garg /****************************************************************************** 23*0eb275c9SSumit Garg * Helper function to initialize SQ CCN driver. 24*0eb275c9SSumit Garg *****************************************************************************/ 25*0eb275c9SSumit Garg void plat_sq_interconnect_init(void) 26*0eb275c9SSumit Garg { 27*0eb275c9SSumit Garg ccn_init(&sq_ccn_desc); 28*0eb275c9SSumit Garg } 29*0eb275c9SSumit Garg 30*0eb275c9SSumit Garg /****************************************************************************** 31*0eb275c9SSumit Garg * Helper function to place current master into coherency 32*0eb275c9SSumit Garg *****************************************************************************/ 33*0eb275c9SSumit Garg void plat_sq_interconnect_enter_coherency(void) 34*0eb275c9SSumit Garg { 35*0eb275c9SSumit Garg ccn_enter_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 36*0eb275c9SSumit Garg } 37*0eb275c9SSumit Garg 38*0eb275c9SSumit Garg /****************************************************************************** 39*0eb275c9SSumit Garg * Helper function to remove current master from coherency 40*0eb275c9SSumit Garg *****************************************************************************/ 41*0eb275c9SSumit Garg void plat_sq_interconnect_exit_coherency(void) 42*0eb275c9SSumit Garg { 43*0eb275c9SSumit Garg ccn_exit_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 44*0eb275c9SSumit Garg } 45