1*c35d59a3SSumit Garg /* 2*c35d59a3SSumit Garg * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3*c35d59a3SSumit Garg * 4*c35d59a3SSumit Garg * SPDX-License-Identifier: BSD-3-Clause 5*c35d59a3SSumit Garg */ 6*c35d59a3SSumit Garg 7*c35d59a3SSumit Garg #ifndef __PLATFORM_DEF_H__ 8*c35d59a3SSumit Garg #define __PLATFORM_DEF_H__ 9*c35d59a3SSumit Garg 10*c35d59a3SSumit Garg #include <common_def.h> 11*c35d59a3SSumit Garg 12*c35d59a3SSumit Garg #define CACHE_WRITEBACK_SHIFT 6 13*c35d59a3SSumit Garg #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) 14*c35d59a3SSumit Garg 15*c35d59a3SSumit Garg #define PLATFORM_STACK_SIZE 0x400 16*c35d59a3SSumit Garg 17*c35d59a3SSumit Garg #define BL31_BASE 0x04000000 18*c35d59a3SSumit Garg #define BL31_SIZE 0x00080000 19*c35d59a3SSumit Garg #define BL31_LIMIT (BL31_BASE + BL31_SIZE) 20*c35d59a3SSumit Garg 21*c35d59a3SSumit Garg #endif /* __PLATFORM_DEF_H__ */ 22