xref: /rk3399_ARM-atf/plat/rpi/rpi4/platform.mk (revision 682607fbd775e37fb5631508434dab9e60220c9a)
1f5cb15b0SAndre Przywara#
2ffb77421SChris Kay# Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
3f5cb15b0SAndre Przywara#
4f5cb15b0SAndre Przywara# SPDX-License-Identifier: BSD-3-Clause
5f5cb15b0SAndre Przywara#
6f5cb15b0SAndre Przywara
7f5cb15b0SAndre Przywarainclude lib/libfdt/libfdt.mk
8f5cb15b0SAndre Przywarainclude lib/xlat_tables_v2/xlat_tables.mk
9f5cb15b0SAndre Przywara
10830c7657SJan Kiszkainclude drivers/arm/gic/v2/gicv2.mk
11830c7657SJan Kiszka
12f5cb15b0SAndre PrzywaraPLAT_INCLUDES		:=	-Iplat/rpi/common/include		\
13f5cb15b0SAndre Przywara				-Iplat/rpi/rpi4/include
14f5cb15b0SAndre Przywara
15f5cb15b0SAndre PrzywaraPLAT_BL_COMMON_SOURCES	:=	drivers/ti/uart/aarch64/16550_console.S	\
165e6d821cSAndre Przywara				drivers/arm/pl011/aarch64/pl011_console.S \
17f5cb15b0SAndre Przywara				plat/rpi/common/rpi3_common.c		\
18b5029782SMario Bălănică				plat/rpi/common/rpi3_console_dual.c	\
19f5cb15b0SAndre Przywara				${XLAT_TABLES_LIB_SRCS}
20f5cb15b0SAndre Przywara
21f5cb15b0SAndre PrzywaraBL31_SOURCES		+=	lib/cpus/aarch64/cortex_a72.S		\
2207aa0c7eSAndre Przywara				plat/rpi/common/aarch64/plat_helpers.S	\
2397ef5305SMario Bălănică				plat/rpi/common/aarch64/armstub8_header.S \
249cc3fa1bSAndre Przywara				drivers/delay_timer/delay_timer.c	\
259cc3fa1bSAndre Przywara				drivers/gpio/gpio.c			\
269cc3fa1bSAndre Przywara				drivers/rpi3/gpio/rpi3_gpio.c		\
27f5cb15b0SAndre Przywara				plat/common/plat_gicv2.c                \
2897ef5305SMario Bălănică				plat/rpi/common/rpi4_bl31_setup.c	\
2997ef5305SMario Bălănică				plat/rpi/rpi4/rpi4_setup.c		\
30f5cb15b0SAndre Przywara				plat/rpi/common/rpi3_pm.c		\
31f5cb15b0SAndre Przywara				plat/common/plat_psci_common.c		\
32f5cb15b0SAndre Przywara				plat/rpi/common/rpi3_topology.c		\
33f67fa69cSAndre Przywara				common/fdt_fixup.c			\
34830c7657SJan Kiszka				${LIBFDT_SRCS}				\
35830c7657SJan Kiszka				${GICV2_SOURCES}
36f5cb15b0SAndre Przywara
37f5cb15b0SAndre Przywara# For now we only support BL31, using the kernel loaded by the GPU firmware.
38f5cb15b0SAndre PrzywaraRESET_TO_BL31		:=	1
39f5cb15b0SAndre Przywara
40f5cb15b0SAndre Przywara# All CPUs enter armstub8.bin.
41f5cb15b0SAndre PrzywaraCOLD_BOOT_SINGLE_CPU	:=	0
42f5cb15b0SAndre Przywara
43f5cb15b0SAndre Przywara# Tune compiler for Cortex-A72
448620bd0bSChris Kayifeq ($($(ARCH)-cc-id),arm-clang)
45f5cb15b0SAndre Przywara    TF_CFLAGS_aarch64	+=	-mcpu=cortex-a72
468620bd0bSChris Kayelse ifneq ($(filter %-clang,$($(ARCH)-cc-id)),)
47f5cb15b0SAndre Przywara    TF_CFLAGS_aarch64	+=	-mcpu=cortex-a72
48f5cb15b0SAndre Przywaraelse
49f5cb15b0SAndre Przywara    TF_CFLAGS_aarch64	+=	-mtune=cortex-a72
50f5cb15b0SAndre Przywaraendif
51f5cb15b0SAndre Przywara
52c4597e13SAndre Przywara# Add support for platform supplied linker script for BL31 build
53c4597e13SAndre Przywara$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
54f5cb15b0SAndre Przywara
55f5cb15b0SAndre Przywara# Enable all errata workarounds for Cortex-A72
56f5cb15b0SAndre PrzywaraERRATA_A72_859971		:= 1
57f5cb15b0SAndre Przywara
58f5cb15b0SAndre PrzywaraWORKAROUND_CVE_2017_5715	:= 1
59f5cb15b0SAndre Przywara
60f5cb15b0SAndre Przywara# Add new default target when compiling this platform
61f5cb15b0SAndre Przywaraall: bl31
62f5cb15b0SAndre Przywara
63f5cb15b0SAndre Przywara# Build config flags
64f5cb15b0SAndre Przywara# ------------------
65f5cb15b0SAndre Przywara
66f5cb15b0SAndre Przywara# Disable stack protector by default
67f5cb15b0SAndre PrzywaraENABLE_STACK_PROTECTOR	 	:= 0
68f5cb15b0SAndre Przywara
69f5cb15b0SAndre Przywara# Have different sections for code and rodata
70f5cb15b0SAndre PrzywaraSEPARATE_CODE_AND_RODATA	:= 1
71f5cb15b0SAndre Przywara
72f5cb15b0SAndre Przywara# Use Coherent memory
73f5cb15b0SAndre PrzywaraUSE_COHERENT_MEM		:= 1
74f5cb15b0SAndre Przywara
75f5cb15b0SAndre Przywara# Platform build flags
76f5cb15b0SAndre Przywara# --------------------
77f5cb15b0SAndre Przywara
78448fb352SAndre Przywara# There is not much else than a Linux kernel to load at the moment.
79448fb352SAndre PrzywaraRPI3_DIRECT_LINUX_BOOT		:= 1
80f5cb15b0SAndre Przywara
81f5cb15b0SAndre Przywara# BL33 images are in AArch64 by default
82f5cb15b0SAndre PrzywaraRPI3_BL33_IN_AARCH32		:= 0
83f5cb15b0SAndre Przywara
84f5cb15b0SAndre Przywara# UART to use at runtime. -1 means the runtime UART is disabled.
85f5cb15b0SAndre Przywara# Any other value means the default UART will be used.
86f5cb15b0SAndre PrzywaraRPI3_RUNTIME_UART		:= 0
87f5cb15b0SAndre Przywara
88f5cb15b0SAndre Przywara# Use normal memory mapping for ROM, FIP, SRAM and DRAM
89f5cb15b0SAndre PrzywaraRPI3_USE_UEFI_MAP		:= 0
90f5cb15b0SAndre Przywara
916e63cdc5SJeremy Linton# SMCCC PCI support (should be enabled for ACPI builds)
926e63cdc5SJeremy LintonSMC_PCI_SUPPORT            	:= 0
936e63cdc5SJeremy Linton
94f5cb15b0SAndre Przywara# Process platform flags
95f5cb15b0SAndre Przywara# ----------------------
96f5cb15b0SAndre Przywara
97f5cb15b0SAndre Przywara$(eval $(call add_define,RPI3_BL33_IN_AARCH32))
98f5cb15b0SAndre Przywara$(eval $(call add_define,RPI3_DIRECT_LINUX_BOOT))
99f5cb15b0SAndre Przywaraifdef RPI3_PRELOADED_DTB_BASE
100f5cb15b0SAndre Przywara$(eval $(call add_define,RPI3_PRELOADED_DTB_BASE))
101f5cb15b0SAndre Przywaraendif
102f5cb15b0SAndre Przywara$(eval $(call add_define,RPI3_RUNTIME_UART))
103f5cb15b0SAndre Przywara$(eval $(call add_define,RPI3_USE_UEFI_MAP))
1046e63cdc5SJeremy Linton$(eval $(call add_define,SMC_PCI_SUPPORT))
105f5cb15b0SAndre Przywara
106f5cb15b0SAndre Przywaraifeq (${ARCH},aarch32)
107f5cb15b0SAndre Przywara  $(error Error: AArch32 not supported on rpi4)
108f5cb15b0SAndre Przywaraendif
109f5cb15b0SAndre Przywara
110f5cb15b0SAndre Przywaraifneq ($(ENABLE_STACK_PROTECTOR), 0)
111f5cb15b0SAndre PrzywaraPLAT_BL_COMMON_SOURCES	+=	drivers/rpi3/rng/rpi3_rng.c		\
112f5cb15b0SAndre Przywara				plat/rpi/common/rpi3_stack_protector.c
113f5cb15b0SAndre Przywaraendif
1146e63cdc5SJeremy Linton
1156e63cdc5SJeremy Lintonifeq ($(SMC_PCI_SUPPORT), 1)
116*682607fbSMario BălănicăBL31_SOURCES            +=      plat/rpi/common/rpi_pci_svc.c
1176e63cdc5SJeremy Lintonendif
118