1 /* 2 * Copyright (c) 2015-2025, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include "./include/rpi3_measured_boot.h" 10 11 #include <arch_helpers.h> 12 #include <common/bl_common.h> 13 #include <common/debug.h> 14 #include <common/desc_image_load.h> 15 #include <lib/optee_utils.h> 16 #include <lib/xlat_tables/xlat_mmu_helpers.h> 17 #include <lib/xlat_tables/xlat_tables_defs.h> 18 #include <drivers/generic_delay_timer.h> 19 #include <drivers/rpi3/gpio/rpi3_gpio.h> 20 #include <drivers/rpi3/sdhost/rpi3_sdhost.h> 21 #include <platform_def.h> 22 23 #include <rpi_shared.h> 24 25 /* Data structure which holds the extents of the trusted SRAM for BL2 */ 26 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 27 28 /* Data structure which holds the MMC info */ 29 static struct mmc_device_info mmc_info; 30 31 /* Variables that hold the eventlog addr and size for use in BL2 Measured Boot */ 32 static uint8_t *event_log_start; 33 static size_t event_log_size; 34 35 static void rpi3_sdhost_setup(void) 36 { 37 struct rpi3_sdhost_params params; 38 39 memset(¶ms, 0, sizeof(struct rpi3_sdhost_params)); 40 params.reg_base = RPI3_SDHOST_BASE; 41 params.bus_width = MMC_BUS_WIDTH_1; 42 params.clk_rate = 50000000; 43 params.clk_rate_initial = (RPI3_SDHOST_MAX_CLOCK / HC_CLOCKDIVISOR_MAXVAL); 44 mmc_info.mmc_dev_type = MMC_IS_SD_HC; 45 mmc_info.ocr_voltage = OCR_3_2_3_3 | OCR_3_3_3_4; 46 rpi3_sdhost_init(¶ms, &mmc_info); 47 } 48 49 void rpi3_mboot_fetch_eventlog_info(uint8_t **eventlog_addr, size_t *eventlog_size) 50 { 51 *eventlog_addr = event_log_start; 52 *eventlog_size = event_log_size; 53 } 54 55 /******************************************************************************* 56 * BL1 has passed the extents of the trusted SRAM that should be visible to BL2 57 * in x0. This memory layout is sitting at the base of the free trusted SRAM. 58 * Copy it to a safe location before its reclaimed by later BL2 functionality. 59 ******************************************************************************/ 60 61 void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, 62 u_register_t arg2, u_register_t arg3) 63 { 64 meminfo_t *mem_layout = (meminfo_t *) arg1; 65 66 /* Initialize the console to provide early debug support */ 67 rpi3_console_init(); 68 69 /* Enable arch timer */ 70 generic_delay_timer_init(); 71 72 /* Setup GPIO driver */ 73 rpi3_gpio_init(); 74 75 /* Setup the BL2 memory layout */ 76 bl2_tzram_layout = *mem_layout; 77 78 /* Setup SDHost driver */ 79 rpi3_sdhost_setup(); 80 81 /* populate eventlog addr and size for use in bl2 mboot */ 82 event_log_start = (uint8_t *)(uintptr_t)arg2; 83 event_log_size = arg3; 84 85 plat_rpi3_io_setup(); 86 } 87 88 void bl2_platform_setup(void) 89 { 90 /* 91 * This is where a TrustZone address space controller and other 92 * security related peripherals would be configured. 93 */ 94 } 95 96 /******************************************************************************* 97 * Perform the very early platform specific architectural setup here. 98 ******************************************************************************/ 99 void bl2_plat_arch_setup(void) 100 { 101 rpi3_setup_page_tables(bl2_tzram_layout.total_base, 102 bl2_tzram_layout.total_size, 103 BL_CODE_BASE, BL_CODE_END, 104 BL_RO_DATA_BASE, BL_RO_DATA_END 105 #if USE_COHERENT_MEM 106 , BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END 107 #endif 108 ); 109 110 enable_mmu_el1(0); 111 } 112 113 /******************************************************************************* 114 * This function can be used by the platforms to update/use image 115 * information for given `image_id`. 116 ******************************************************************************/ 117 int bl2_plat_handle_post_image_load(unsigned int image_id) 118 { 119 int err = 0; 120 bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id); 121 #ifdef SPD_opteed 122 bl_mem_params_node_t *pager_mem_params = NULL; 123 bl_mem_params_node_t *paged_mem_params = NULL; 124 #endif 125 126 assert(bl_mem_params != NULL); 127 128 switch (image_id) { 129 case BL32_IMAGE_ID: 130 #ifdef SPD_opteed 131 pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID); 132 assert(pager_mem_params); 133 134 paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID); 135 assert(paged_mem_params); 136 137 err = parse_optee_header(&bl_mem_params->ep_info, 138 &pager_mem_params->image_info, 139 &paged_mem_params->image_info); 140 if (err != 0) 141 WARN("OPTEE header parse error.\n"); 142 #endif 143 bl_mem_params->ep_info.spsr = rpi3_get_spsr_for_bl32_entry(); 144 break; 145 146 case BL33_IMAGE_ID: 147 /* BL33 expects to receive the primary CPU MPID (through r0) */ 148 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr(); 149 bl_mem_params->ep_info.spsr = rpi3_get_spsr_for_bl33_entry(); 150 151 /* Shutting down the SDHost driver to let BL33 drives SDHost.*/ 152 rpi3_sdhost_stop(); 153 break; 154 155 default: 156 /* Do nothing in default case */ 157 break; 158 } 159 160 return err; 161 } 162