1 /* 2 * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <platform_def.h> 8 9 #include <arch.h> 10 #include <arch_helpers.h> 11 #include <common/bl_common.h> 12 #include <common/debug.h> 13 #include <lib/mmio.h> 14 #include <lib/xlat_tables/xlat_mmu_helpers.h> 15 #include <lib/xlat_tables/xlat_tables_defs.h> 16 17 #include <rpi_shared.h> 18 19 /* Data structure which holds the extents of the trusted SRAM for BL1 */ 20 static meminfo_t bl1_tzram_layout; 21 22 meminfo_t *bl1_plat_sec_mem_layout(void) 23 { 24 return &bl1_tzram_layout; 25 } 26 27 /******************************************************************************* 28 * Perform any BL1 specific platform actions. 29 ******************************************************************************/ 30 void bl1_early_platform_setup(void) 31 { 32 /* use the 19.2 MHz clock for the architected timer */ 33 mmio_write_32(RPI3_INTC_BASE_ADDRESS + RPI3_INTC_CONTROL_OFFSET, 0); 34 mmio_write_32(RPI3_INTC_BASE_ADDRESS + RPI3_INTC_PRESCALER_OFFSET, 35 0x80000000); 36 37 /* Initialize the console to provide early debug support */ 38 rpi3_console_init(); 39 40 /* Allow BL1 to see the whole Trusted RAM */ 41 bl1_tzram_layout.total_base = BL_RAM_BASE; 42 bl1_tzram_layout.total_size = BL_RAM_SIZE; 43 } 44 45 /****************************************************************************** 46 * Perform the very early platform specific architecture setup. This only 47 * does basic initialization. Later architectural setup (bl1_arch_setup()) 48 * does not do anything platform specific. 49 *****************************************************************************/ 50 void bl1_plat_arch_setup(void) 51 { 52 rpi3_setup_page_tables(bl1_tzram_layout.total_base, 53 bl1_tzram_layout.total_size, 54 BL_CODE_BASE, BL1_CODE_END, 55 BL1_RO_DATA_BASE, BL1_RO_DATA_END 56 #if USE_COHERENT_MEM 57 , BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END 58 #endif 59 ); 60 61 enable_mmu_el3(0); 62 } 63 64 void bl1_platform_setup(void) 65 { 66 uint32_t __unused rev; 67 int __unused rc; 68 69 rc = rpi3_vc_hardware_get_board_revision(&rev); 70 71 if (rc == 0) { 72 const char __unused *model, __unused *info; 73 74 switch (rev) { 75 case 0xA02082: 76 model = "Raspberry Pi 3 Model B"; 77 info = "(1GB, Sony, UK)"; 78 break; 79 case 0xA22082: 80 model = "Raspberry Pi 3 Model B"; 81 info = "(1GB, Embest, China)"; 82 break; 83 case 0xA020D3: 84 model = "Raspberry Pi 3 Model B+"; 85 info = "(1GB, Sony, UK)"; 86 break; 87 default: 88 model = "Unknown"; 89 info = "(Unknown)"; 90 ERROR("rpi3: Unknown board revision 0x%08x\n", rev); 91 break; 92 } 93 94 NOTICE("rpi3: Detected: %s %s [0x%08x]\n", model, info, rev); 95 } else { 96 ERROR("rpi3: Unable to detect board revision\n"); 97 } 98 99 /* Initialise the IO layer and register platform IO devices */ 100 plat_rpi3_io_setup(); 101 } 102