1# 2# Copyright (c) 2013-2025, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include lib/libfdt/libfdt.mk 8include lib/xlat_tables_v2/xlat_tables.mk 9 10PLAT_INCLUDES := -Iplat/rpi/common/include \ 11 -Iplat/rpi/rpi3/include 12 13PLAT_BL_COMMON_SOURCES := drivers/ti/uart/aarch64/16550_console.S \ 14 drivers/arm/pl011/aarch64/pl011_console.S \ 15 drivers/gpio/gpio.c \ 16 drivers/delay_timer/delay_timer.c \ 17 drivers/rpi3/gpio/rpi3_gpio.c \ 18 plat/rpi/common/aarch64/plat_helpers.S \ 19 plat/rpi/common/rpi3_common.c \ 20 plat/rpi/common/rpi3_console_dual.c \ 21 ${XLAT_TABLES_LIB_SRCS} 22 23ifeq (${MEASURED_BOOT},1) 24MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk 25$(info Including ${MEASURED_BOOT_MK}) 26include ${MEASURED_BOOT_MK} 27 28PLAT_BL_COMMON_SOURCES += ${EVENT_LOG_SOURCES} 29 30BL1_SOURCES += plat/rpi/rpi3/rpi3_bl1_mboot.c 31BL2_SOURCES += plat/rpi/rpi3/rpi3_bl2_mboot.c 32 33CRYPTO_SOURCES := drivers/auth/crypto_mod.c 34 35BL1_SOURCES += ${CRYPTO_SOURCES} 36BL2_SOURCES += ${CRYPTO_SOURCES} 37 38include drivers/auth/mbedtls/mbedtls_crypto.mk 39 40endif 41 42BL1_SOURCES += drivers/io/io_fip.c \ 43 drivers/io/io_memmap.c \ 44 drivers/io/io_storage.c \ 45 drivers/delay_timer/generic_delay_timer.c \ 46 lib/cpus/aarch64/cortex_a53.S \ 47 plat/common/aarch64/platform_mp_stack.S \ 48 plat/rpi/rpi3/rpi3_bl1_setup.c \ 49 plat/rpi/common/rpi3_io_storage.c \ 50 drivers/rpi3/mailbox/rpi3_mbox.c \ 51 plat/rpi/rpi3/rpi_mbox_board.c 52 53BL2_SOURCES += common/desc_image_load.c \ 54 drivers/io/io_fip.c \ 55 drivers/io/io_memmap.c \ 56 drivers/io/io_storage.c \ 57 drivers/delay_timer/generic_delay_timer.c \ 58 drivers/io/io_block.c \ 59 drivers/mmc/mmc.c \ 60 drivers/rpi3/sdhost/rpi3_sdhost.c \ 61 plat/common/aarch64/platform_mp_stack.S \ 62 plat/rpi/rpi3/aarch64/rpi3_bl2_mem_params_desc.c \ 63 plat/rpi/rpi3/rpi3_bl2_setup.c \ 64 plat/rpi/common/rpi3_image_load.c \ 65 plat/rpi/common/rpi3_io_storage.c 66 67BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ 68 plat/common/plat_gicv2.c \ 69 plat/common/plat_psci_common.c \ 70 plat/rpi/rpi3/rpi3_bl31_setup.c \ 71 plat/rpi/common/rpi3_pm.c \ 72 plat/rpi/common/rpi3_topology.c \ 73 ${LIBFDT_SRCS} 74 75# Tune compiler for Cortex-A53 76ifeq ($($(ARCH)-cc-id),arm-clang) 77 TF_CFLAGS_aarch64 += -mcpu=cortex-a53 78else ifneq ($(filter %-clang,$($(ARCH)-cc-id)),) 79 TF_CFLAGS_aarch64 += -mcpu=cortex-a53 80else 81 TF_CFLAGS_aarch64 += -mtune=cortex-a53 82endif 83 84# Platform Makefile target 85# ------------------------ 86 87RPI3_BL1_PAD_BIN := ${BUILD_PLAT}/bl1_pad.bin 88RPI3_ARMSTUB8_BIN := ${BUILD_PLAT}/armstub8.bin 89 90# Add new default target when compiling this platform 91all: armstub 92 93# This target concatenates BL1 and the FIP so that the base addresses match the 94# ones defined in the memory map 95armstub: bl1 fip 96 $(s)echo " CAT $@" 97 $(q)cp ${BUILD_PLAT}/bl1.bin ${RPI3_BL1_PAD_BIN} 98 $(q)truncate --size=131072 ${RPI3_BL1_PAD_BIN} 99 $(q)cat ${RPI3_BL1_PAD_BIN} ${BUILD_PLAT}/fip.bin > ${RPI3_ARMSTUB8_BIN} 100 $(s)echo 101 $(s)echo "Built $@ successfully" 102 $(s)echo 103 104# Build config flags 105# ------------------ 106 107# Enable all errata workarounds for Cortex-A53 108ERRATA_A53_826319 := 1 109ERRATA_A53_835769 := 1 110ERRATA_A53_836870 := 1 111ERRATA_A53_843419 := 1 112ERRATA_A53_855873 := 1 113 114WORKAROUND_CVE_2017_5715 := 0 115 116# Disable stack protector by default 117ENABLE_STACK_PROTECTOR := 0 118 119# Reset to BL31 isn't supported 120RESET_TO_BL31 := 0 121 122# Have different sections for code and rodata 123SEPARATE_CODE_AND_RODATA := 1 124 125# Use Coherent memory 126USE_COHERENT_MEM := 1 127 128# Platform build flags 129# -------------------- 130 131# BL33 images are in AArch64 by default 132RPI3_BL33_IN_AARCH32 := 0 133 134# Assume that BL33 isn't the Linux kernel by default 135RPI3_DIRECT_LINUX_BOOT := 0 136 137# UART to use at runtime. -1 means the runtime UART is disabled. 138# Any other value means the default UART will be used. 139RPI3_RUNTIME_UART := -1 140 141# Use normal memory mapping for ROM, FIP, SRAM and DRAM 142RPI3_USE_UEFI_MAP := 0 143 144# BL32 location 145RPI3_BL32_RAM_LOCATION := tdram 146ifeq (${RPI3_BL32_RAM_LOCATION}, tsram) 147 RPI3_BL32_RAM_LOCATION_ID = SEC_SRAM_ID 148else ifeq (${RPI3_BL32_RAM_LOCATION}, tdram) 149 RPI3_BL32_RAM_LOCATION_ID = SEC_DRAM_ID 150else 151 $(error "Unsupported RPI3_BL32_RAM_LOCATION value") 152endif 153 154# Process platform flags 155# ---------------------- 156 157$(eval $(call add_define,RPI3_BL32_RAM_LOCATION_ID)) 158$(eval $(call add_define,RPI3_BL33_IN_AARCH32)) 159$(eval $(call add_define,RPI3_DIRECT_LINUX_BOOT)) 160ifdef RPI3_PRELOADED_DTB_BASE 161$(eval $(call add_define,RPI3_PRELOADED_DTB_BASE)) 162endif 163$(eval $(call add_define,RPI3_RUNTIME_UART)) 164$(eval $(call add_define,RPI3_USE_UEFI_MAP)) 165 166# Verify build config 167# ------------------- 168# 169ifneq (${RPI3_DIRECT_LINUX_BOOT}, 0) 170 ifndef RPI3_PRELOADED_DTB_BASE 171 $(error Error: RPI3_PRELOADED_DTB_BASE needed if RPI3_DIRECT_LINUX_BOOT=1) 172 endif 173endif 174 175ifneq (${RESET_TO_BL31}, 0) 176 $(error Error: rpi3 needs RESET_TO_BL31=0) 177endif 178 179ifeq (${ARCH},aarch32) 180 $(error Error: AArch32 not supported on rpi3) 181endif 182 183ifneq ($(ENABLE_STACK_PROTECTOR), 0) 184PLAT_BL_COMMON_SOURCES += drivers/rpi3/rng/rpi3_rng.c \ 185 plat/rpi/common/rpi3_stack_protector.c 186endif 187 188ifeq (${SPD},opteed) 189BL2_SOURCES += \ 190 lib/optee/optee_utils.c 191endif 192 193# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 194# in the FIP if the platform requires. 195ifneq ($(BL32_EXTRA1),) 196$(eval $(call TOOL_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1)) 197endif 198ifneq ($(BL32_EXTRA2),) 199$(eval $(call TOOL_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2)) 200endif 201 202ifneq (${TRUSTED_BOARD_BOOT},0) 203 204 include drivers/auth/mbedtls/mbedtls_crypto.mk 205 include drivers/auth/mbedtls/mbedtls_x509.mk 206 207 AUTH_SOURCES := drivers/auth/auth_mod.c \ 208 drivers/auth/crypto_mod.c \ 209 drivers/auth/img_parser_mod.c \ 210 drivers/auth/tbbr/tbbr_cot_common.c 211 212 BL1_SOURCES += ${AUTH_SOURCES} \ 213 bl1/tbbr/tbbr_img_desc.c \ 214 plat/common/tbbr/plat_tbbr.c \ 215 plat/rpi/common/rpi3_trusted_boot.c \ 216 plat/rpi/common/rpi3_rotpk.S \ 217 drivers/auth/tbbr/tbbr_cot_bl1.c 218 219 BL2_SOURCES += ${AUTH_SOURCES} \ 220 plat/common/tbbr/plat_tbbr.c \ 221 plat/rpi/common/rpi3_trusted_boot.c \ 222 plat/rpi/common/rpi3_rotpk.S \ 223 drivers/auth/tbbr/tbbr_cot_bl2.c 224 225 ROT_KEY = $(BUILD_PLAT)/rot_key.pem 226 ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin 227 228 $(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"')) 229 230 $(BUILD_PLAT)/bl1/rpi3_rotpk.o: $(ROTPK_HASH) 231 $(BUILD_PLAT)/bl2/rpi3_rotpk.o: $(ROTPK_HASH) 232 233 certificates: $(ROT_KEY) 234 235 $(ROT_KEY): | $$(@D)/ 236 $(s)echo " OPENSSL $@" 237 $(q)${OPENSSL_BIN_PATH}/openssl genrsa 2048 > $@ 2>/dev/null 238 239 $(ROTPK_HASH): $(ROT_KEY) | $$(@D)/ 240 $(s)echo " OPENSSL $@" 241 $(q)${OPENSSL_BIN_PATH}/openssl rsa -in $< -pubout -outform DER 2>/dev/null |\ 242 ${OPENSSL_BIN_PATH}/openssl dgst -sha256 -binary > $@ 2>/dev/null 243endif 244