xref: /rk3399_ARM-atf/plat/rpi/rpi3/platform.mk (revision 06f3c7058c42a9f1a9f7df75ea2de71a000855e8)
1#
2# Copyright (c) 2013-2025, Arm Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include lib/libfdt/libfdt.mk
8include lib/xlat_tables_v2/xlat_tables.mk
9
10PLAT_INCLUDES		:=	-Iplat/rpi/common/include		\
11				-Iplat/rpi/rpi3/include			\
12				-Iinclude/lib/libfdt
13
14PLAT_BL_COMMON_SOURCES	:=	drivers/ti/uart/aarch64/16550_console.S	\
15				drivers/arm/pl011/aarch64/pl011_console.S \
16				drivers/gpio/gpio.c			\
17				drivers/delay_timer/delay_timer.c	\
18				drivers/rpi3/gpio/rpi3_gpio.c		\
19				plat/rpi/common/aarch64/plat_helpers.S	\
20				plat/rpi/common/rpi3_common.c		\
21				plat/rpi/common/rpi3_console_dual.c	\
22				${XLAT_TABLES_LIB_SRCS}
23
24ifeq (${DISCRETE_TPM},1)
25TPM2_MK := drivers/tpm/tpm2.mk
26$(info Including ${TPM2_MK})
27include ${TPM2_MK}
28endif
29
30ifeq (${TPM_INTERFACE},FIFO_SPI)
31PLAT_BL_COMMON_SOURCES	+=	drivers/gpio/gpio_spi.c		\
32				drivers/tpm/tpm2_slb9670/slb9670_gpio.c
33endif
34
35ifeq (${MEASURED_BOOT},1)
36MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk
37$(info Including ${MEASURED_BOOT_MK})
38include ${MEASURED_BOOT_MK}
39
40PLAT_BL_COMMON_SOURCES	+=	$(TPM2_SOURCES)				\
41				${EVENT_LOG_SOURCES}
42
43BL1_SOURCES		+= 	plat/rpi/rpi3/rpi3_bl1_mboot.c
44BL2_SOURCES		+= 	plat/rpi/rpi3/rpi3_bl2_mboot.c		\
45				plat/rpi/rpi3/rpi3_dyn_cfg_helpers.c	\
46				common/fdt_wrappers.c			\
47				common/fdt_fixup.c
48
49CRYPTO_SOURCES		:=	drivers/auth/crypto_mod.c
50
51BL1_SOURCES		+=	${CRYPTO_SOURCES}
52BL2_SOURCES		+=	${CRYPTO_SOURCES}
53
54include drivers/auth/mbedtls/mbedtls_crypto.mk
55
56endif
57
58BL1_SOURCES		+=	drivers/io/io_fip.c			\
59				drivers/io/io_memmap.c			\
60				drivers/io/io_storage.c			\
61				drivers/delay_timer/generic_delay_timer.c \
62				lib/cpus/aarch64/cortex_a53.S		\
63				plat/common/aarch64/platform_mp_stack.S	\
64				plat/rpi/rpi3/rpi3_bl1_setup.c		\
65				plat/rpi/common/rpi3_io_storage.c	\
66				drivers/rpi3/mailbox/rpi3_mbox.c	\
67				plat/rpi/rpi3/rpi_mbox_board.c
68
69BL2_SOURCES		+=	common/desc_image_load.c		\
70				drivers/io/io_fip.c			\
71				drivers/io/io_memmap.c			\
72				drivers/io/io_storage.c			\
73				drivers/delay_timer/generic_delay_timer.c \
74				drivers/io/io_block.c			\
75				drivers/mmc/mmc.c			\
76				drivers/rpi3/sdhost/rpi3_sdhost.c	\
77				plat/common/aarch64/platform_mp_stack.S	\
78				plat/rpi/rpi3/aarch64/rpi3_bl2_mem_params_desc.c \
79				plat/rpi/rpi3/rpi3_bl2_setup.c		\
80				plat/rpi/common/rpi3_image_load.c	\
81				plat/rpi/common/rpi3_io_storage.c
82
83BL31_SOURCES		+=	lib/cpus/aarch64/cortex_a53.S		\
84				plat/common/plat_gicv2.c		\
85				plat/common/plat_psci_common.c		\
86				plat/rpi/rpi3/rpi3_bl31_setup.c		\
87				plat/rpi/common/rpi3_pm.c		\
88				plat/rpi/common/rpi3_topology.c		\
89				${LIBFDT_SRCS}
90
91# Tune compiler for Cortex-A53
92ifeq ($($(ARCH)-cc-id),arm-clang)
93    TF_CFLAGS_aarch64	+=	-mcpu=cortex-a53
94else ifneq ($(filter %-clang,$($(ARCH)-cc-id)),)
95    TF_CFLAGS_aarch64	+=	-mcpu=cortex-a53
96else
97    TF_CFLAGS_aarch64	+=	-mtune=cortex-a53
98endif
99
100# Platform Makefile target
101# ------------------------
102
103RPI3_BL1_PAD_BIN	:=	${BUILD_PLAT}/bl1_pad.bin
104RPI3_ARMSTUB8_BIN	:=	${BUILD_PLAT}/armstub8.bin
105
106# Add new default target when compiling this platform
107all: armstub
108
109# This target concatenates BL1 and the FIP so that the base addresses match the
110# ones defined in the memory map
111armstub: bl1 fip
112	$(s)echo "  CAT     $@"
113	$(q)cp ${BUILD_PLAT}/bl1.bin ${RPI3_BL1_PAD_BIN}
114	$(q)truncate --size=131072 ${RPI3_BL1_PAD_BIN}
115	$(q)cat ${RPI3_BL1_PAD_BIN} ${BUILD_PLAT}/fip.bin > ${RPI3_ARMSTUB8_BIN}
116	$(s)echo
117	$(s)echo "Built $@ successfully"
118	$(s)echo
119
120# Build config flags
121# ------------------
122
123# Enable all errata workarounds for Cortex-A53
124ERRATA_A53_826319		:= 1
125ERRATA_A53_835769		:= 1
126ERRATA_A53_836870		:= 1
127ERRATA_A53_843419		:= 1
128ERRATA_A53_855873		:= 1
129
130WORKAROUND_CVE_2017_5715	:= 0
131
132# Disable stack protector by default
133ENABLE_STACK_PROTECTOR	 	:= 0
134
135# Reset to BL31 isn't supported
136RESET_TO_BL31			:= 0
137
138# Have different sections for code and rodata
139SEPARATE_CODE_AND_RODATA	:= 1
140
141# Use Coherent memory
142USE_COHERENT_MEM		:= 1
143
144# Platform build flags
145# --------------------
146
147# BL33 images are in AArch64 by default
148RPI3_BL33_IN_AARCH32		:= 0
149
150# Assume that BL33 isn't the Linux kernel by default
151RPI3_DIRECT_LINUX_BOOT		:= 0
152
153# UART to use at runtime. -1 means the runtime UART is disabled.
154# Any other value means the default UART will be used.
155RPI3_RUNTIME_UART		:= -1
156
157# Use normal memory mapping for ROM, FIP, SRAM and DRAM
158RPI3_USE_UEFI_MAP		:= 0
159
160# BL32 location
161RPI3_BL32_RAM_LOCATION	:= tdram
162ifeq (${RPI3_BL32_RAM_LOCATION}, tsram)
163  RPI3_BL32_RAM_LOCATION_ID = SEC_SRAM_ID
164else ifeq (${RPI3_BL32_RAM_LOCATION}, tdram)
165  RPI3_BL32_RAM_LOCATION_ID = SEC_DRAM_ID
166else
167  $(error "Unsupported RPI3_BL32_RAM_LOCATION value")
168endif
169
170# Process platform flags
171# ----------------------
172
173$(eval $(call add_define,RPI3_BL32_RAM_LOCATION_ID))
174$(eval $(call add_define,RPI3_BL33_IN_AARCH32))
175$(eval $(call add_define,RPI3_DIRECT_LINUX_BOOT))
176ifdef RPI3_PRELOADED_DTB_BASE
177$(eval $(call add_define,RPI3_PRELOADED_DTB_BASE))
178endif
179$(eval $(call add_define,RPI3_RUNTIME_UART))
180$(eval $(call add_define,RPI3_USE_UEFI_MAP))
181
182# Verify build config
183# -------------------
184#
185ifneq (${RPI3_DIRECT_LINUX_BOOT}, 0)
186  ifndef RPI3_PRELOADED_DTB_BASE
187    $(error Error: RPI3_PRELOADED_DTB_BASE needed if RPI3_DIRECT_LINUX_BOOT=1)
188  endif
189endif
190
191ifneq (${RESET_TO_BL31}, 0)
192  $(error Error: rpi3 needs RESET_TO_BL31=0)
193endif
194
195ifeq (${ARCH},aarch32)
196  $(error Error: AArch32 not supported on rpi3)
197endif
198
199ifneq ($(ENABLE_STACK_PROTECTOR), 0)
200PLAT_BL_COMMON_SOURCES	+=	drivers/rpi3/rng/rpi3_rng.c		\
201				plat/rpi/common/rpi3_stack_protector.c
202endif
203
204ifeq (${SPD},opteed)
205BL2_SOURCES	+=							\
206		lib/optee/optee_utils.c
207endif
208
209# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
210# in the FIP if the platform requires.
211ifneq ($(BL32_EXTRA1),)
212$(eval $(call TOOL_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1))
213endif
214ifneq ($(BL32_EXTRA2),)
215$(eval $(call TOOL_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2))
216endif
217
218ifneq (${TRUSTED_BOARD_BOOT},0)
219
220    include drivers/auth/mbedtls/mbedtls_crypto.mk
221    include drivers/auth/mbedtls/mbedtls_x509.mk
222
223    AUTH_MK := drivers/auth/auth.mk
224    $(info Including ${AUTH_MK})
225    include ${AUTH_MK}
226
227    AUTH_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_common.c
228
229    BL1_SOURCES		+=	${AUTH_SOURCES}				\
230				bl1/tbbr/tbbr_img_desc.c		\
231				plat/common/tbbr/plat_tbbr.c		\
232				plat/rpi/common/rpi3_trusted_boot.c    	\
233				plat/rpi/common/rpi3_rotpk.S		\
234				drivers/auth/tbbr/tbbr_cot_bl1.c
235
236    BL2_SOURCES		+=	${AUTH_SOURCES}				\
237				plat/common/tbbr/plat_tbbr.c		\
238				plat/rpi/common/rpi3_trusted_boot.c    	\
239				plat/rpi/common/rpi3_rotpk.S		\
240				drivers/auth/tbbr/tbbr_cot_bl2.c
241
242    ROT_KEY             = $(BUILD_PLAT)/rot_key.pem
243    ROTPK_HASH          = $(BUILD_PLAT)/rotpk_sha256.bin
244
245    $(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
246
247    $(BUILD_PLAT)/bl1/rpi3_rotpk.o: $(ROTPK_HASH)
248    $(BUILD_PLAT)/bl2/rpi3_rotpk.o: $(ROTPK_HASH)
249
250    certificates: $(ROT_KEY)
251
252    $(ROT_KEY): | $$(@D)/
253	$(s)echo "  OPENSSL $@"
254	$(q)${OPENSSL_BIN_PATH}/openssl genrsa 2048 > $@ 2>/dev/null
255
256    $(ROTPK_HASH): $(ROT_KEY) | $$(@D)/
257	$(s)echo "  OPENSSL $@"
258	$(q)${OPENSSL_BIN_PATH}/openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
259	${OPENSSL_BIN_PATH}/openssl dgst -sha256 -binary > $@ 2>/dev/null
260endif
261