xref: /rk3399_ARM-atf/plat/rockchip/rk3588/platform.mk (revision e3ec6ff4b24c7daa4dfa82709c23a22829947160)
1*e3ec6ff4SXiaoDong Huang#
2*e3ec6ff4SXiaoDong Huang# Copyright (c) 2024, Rockchip, Inc. All rights reserved.
3*e3ec6ff4SXiaoDong Huang#
4*e3ec6ff4SXiaoDong Huang# SPDX-License-Identifier: BSD-3-Clause
5*e3ec6ff4SXiaoDong Huang#
6*e3ec6ff4SXiaoDong Huang
7*e3ec6ff4SXiaoDong HuangRK_PLAT			:=	plat/rockchip
8*e3ec6ff4SXiaoDong HuangRK_PLAT_SOC		:=	${RK_PLAT}/${PLAT}
9*e3ec6ff4SXiaoDong HuangRK_PLAT_COMMON		:=	${RK_PLAT}/common
10*e3ec6ff4SXiaoDong Huang
11*e3ec6ff4SXiaoDong HuangDISABLE_BIN_GENERATION	:=	1
12*e3ec6ff4SXiaoDong Huanginclude lib/libfdt/libfdt.mk
13*e3ec6ff4SXiaoDong Huanginclude lib/xlat_tables_v2/xlat_tables.mk
14*e3ec6ff4SXiaoDong Huang
15*e3ec6ff4SXiaoDong Huang# GIC-600 configuration
16*e3ec6ff4SXiaoDong HuangGICV3_IMPL		:=	GIC600
17*e3ec6ff4SXiaoDong HuangGICV3_SUPPORT_GIC600   	:=      1
18*e3ec6ff4SXiaoDong Huang
19*e3ec6ff4SXiaoDong Huang# Include GICv3 driver files
20*e3ec6ff4SXiaoDong Huanginclude drivers/arm/gic/v3/gicv3.mk
21*e3ec6ff4SXiaoDong Huang
22*e3ec6ff4SXiaoDong HuangPLAT_INCLUDES		:=	-Iinclude/plat/common				\
23*e3ec6ff4SXiaoDong Huang				-Idrivers/arm/gic/v3/				\
24*e3ec6ff4SXiaoDong Huang				-I${RK_PLAT_COMMON}/				\
25*e3ec6ff4SXiaoDong Huang				-I${RK_PLAT_COMMON}/drivers/pmu/		\
26*e3ec6ff4SXiaoDong Huang				-I${RK_PLAT_COMMON}/drivers/parameter/		\
27*e3ec6ff4SXiaoDong Huang				-I${RK_PLAT_COMMON}/include/			\
28*e3ec6ff4SXiaoDong Huang				-I${RK_PLAT_COMMON}/pmusram/			\
29*e3ec6ff4SXiaoDong Huang				-I${RK_PLAT_SOC}/				\
30*e3ec6ff4SXiaoDong Huang				-I${RK_PLAT_SOC}/drivers/pmu/			\
31*e3ec6ff4SXiaoDong Huang				-I${RK_PLAT_SOC}/drivers/secure/		\
32*e3ec6ff4SXiaoDong Huang				-I${RK_PLAT_SOC}/drivers/soc/			\
33*e3ec6ff4SXiaoDong Huang				-I${RK_PLAT_SOC}/include/
34*e3ec6ff4SXiaoDong Huang
35*e3ec6ff4SXiaoDong HuangRK_GIC_SOURCES		:=	${GICV3_SOURCES}				\
36*e3ec6ff4SXiaoDong Huang				plat/common/plat_gicv3.c			\
37*e3ec6ff4SXiaoDong Huang				${RK_PLAT}/common/rockchip_gicv3.c
38*e3ec6ff4SXiaoDong Huang
39*e3ec6ff4SXiaoDong HuangPLAT_BL_COMMON_SOURCES	:=	${XLAT_TABLES_LIB_SRCS}				\
40*e3ec6ff4SXiaoDong Huang				common/desc_image_load.c			\
41*e3ec6ff4SXiaoDong Huang				plat/common/aarch64/crash_console_helpers.S	\
42*e3ec6ff4SXiaoDong Huang				lib/bl_aux_params/bl_aux_params.c		\
43*e3ec6ff4SXiaoDong Huang				plat/common/plat_psci_common.c
44*e3ec6ff4SXiaoDong Huang
45*e3ec6ff4SXiaoDong Huangifneq (${ENABLE_STACK_PROTECTOR},0)
46*e3ec6ff4SXiaoDong HuangPLAT_BL_COMMON_SOURCES	+=	${RK_PLAT_COMMON}/rockchip_stack_protector.c
47*e3ec6ff4SXiaoDong Huangendif
48*e3ec6ff4SXiaoDong Huang
49*e3ec6ff4SXiaoDong HuangBL31_SOURCES		+=	${RK_GIC_SOURCES}				\
50*e3ec6ff4SXiaoDong Huang				drivers/ti/uart/aarch64/16550_console.S		\
51*e3ec6ff4SXiaoDong Huang				drivers/delay_timer/delay_timer.c		\
52*e3ec6ff4SXiaoDong Huang				drivers/delay_timer/generic_delay_timer.c	\
53*e3ec6ff4SXiaoDong Huang				lib/cpus/aarch64/cortex_a55.S			\
54*e3ec6ff4SXiaoDong Huang				lib/cpus/aarch64/cortex_a76.S			\
55*e3ec6ff4SXiaoDong Huang				${RK_PLAT_COMMON}/aarch64/plat_helpers.S	\
56*e3ec6ff4SXiaoDong Huang				${RK_PLAT_COMMON}/aarch64/platform_common.c	\
57*e3ec6ff4SXiaoDong Huang				${RK_PLAT_COMMON}/bl31_plat_setup.c		\
58*e3ec6ff4SXiaoDong Huang				${RK_PLAT_COMMON}/plat_pm.c			\
59*e3ec6ff4SXiaoDong Huang				${RK_PLAT_COMMON}/plat_pm_helpers.c		\
60*e3ec6ff4SXiaoDong Huang				${RK_PLAT_COMMON}/plat_topology.c		\
61*e3ec6ff4SXiaoDong Huang				${RK_PLAT_COMMON}/params_setup.c                \
62*e3ec6ff4SXiaoDong Huang				${RK_PLAT_COMMON}/pmusram/cpus_on_fixed_addr.S	\
63*e3ec6ff4SXiaoDong Huang				${RK_PLAT_COMMON}/rockchip_sip_svc.c		\
64*e3ec6ff4SXiaoDong Huang				${RK_PLAT_SOC}/plat_sip_calls.c         	\
65*e3ec6ff4SXiaoDong Huang				${RK_PLAT_SOC}/drivers/secure/secure.c		\
66*e3ec6ff4SXiaoDong Huang				${RK_PLAT_SOC}/drivers/soc/soc.c		\
67*e3ec6ff4SXiaoDong Huang				${RK_PLAT_SOC}/drivers/pmu/pmu.c		\
68*e3ec6ff4SXiaoDong Huang				${RK_PLAT_SOC}/drivers/pmu/pm_pd_regs.c
69*e3ec6ff4SXiaoDong Huang
70*e3ec6ff4SXiaoDong HuangCTX_INCLUDE_AARCH32_REGS :=     0
71*e3ec6ff4SXiaoDong HuangENABLE_PLAT_COMPAT	:=	0
72*e3ec6ff4SXiaoDong HuangMULTI_CONSOLE_API	:=	1
73*e3ec6ff4SXiaoDong HuangERRATA_A55_1530923	:=	1
74*e3ec6ff4SXiaoDong Huang
75*e3ec6ff4SXiaoDong Huang# System coherency is managed in hardware
76*e3ec6ff4SXiaoDong HuangHW_ASSISTED_COHERENCY	:=	1
77*e3ec6ff4SXiaoDong Huang
78*e3ec6ff4SXiaoDong Huang# When building for systems with hardware-assisted coherency, there's no need to
79*e3ec6ff4SXiaoDong Huang# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
80*e3ec6ff4SXiaoDong HuangUSE_COHERENT_MEM	:=	0
81*e3ec6ff4SXiaoDong Huang
82*e3ec6ff4SXiaoDong HuangENABLE_SPE_FOR_LOWER_ELS	:= 0
83*e3ec6ff4SXiaoDong Huang
84*e3ec6ff4SXiaoDong Huang$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
85*e3ec6ff4SXiaoDong Huang$(eval $(call add_define,PLAT_SKIP_DFS_TLB_DCACHE_MAINTENANCE))
86