1# 2# Copyright (c) 2025, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7RK_PLAT := plat/rockchip 8RK_PLAT_SOC := ${RK_PLAT}/${PLAT} 9RK_PLAT_COMMON := ${RK_PLAT}/common 10 11DISABLE_BIN_GENERATION := 1 12 13include drivers/arm/gic/v2/gicv2.mk 14include lib/libfdt/libfdt.mk 15include lib/xlat_tables_v2/xlat_tables.mk 16 17PLAT_INCLUDES := -Idrivers/arm/gic/common/ \ 18 -Idrivers/arm/gic/v2/ \ 19 -Idrivers/scmi-msg/ \ 20 -Iinclude/bl31 \ 21 -Iinclude/common \ 22 -Iinclude/drivers \ 23 -Iinclude/drivers/arm \ 24 -Iinclude/drivers/io \ 25 -Iinclude/drivers/ti/uart \ 26 -Iinclude/lib \ 27 -Iinclude/lib/cpus/${ARCH} \ 28 -Iinclude/lib/el3_runtime \ 29 -Iinclude/lib/psci \ 30 -Iinclude/plat/common \ 31 -Iinclude/services \ 32 -I${RK_PLAT_COMMON}/ \ 33 -I${RK_PLAT_COMMON}/pmusram/ \ 34 -I${RK_PLAT_COMMON}/include/ \ 35 -I${RK_PLAT_COMMON}/drivers/pmu/ \ 36 -I${RK_PLAT_COMMON}/drivers/parameter/ \ 37 -I${RK_PLAT_COMMON}/scmi/ \ 38 -I${RK_PLAT_SOC}/ \ 39 -I${RK_PLAT_SOC}/drivers/dmc/ \ 40 -I${RK_PLAT_SOC}/drivers/pmu/ \ 41 -I${RK_PLAT_SOC}/drivers/secure/ \ 42 -I${RK_PLAT_SOC}/drivers/soc/ \ 43 -I${RK_PLAT_SOC}/include/ \ 44 -I${RK_PLAT_SOC}/scmi/ 45 46RK_GIC_SOURCES := ${GICV2_SOURCES} \ 47 plat/common/plat_gicv2.c \ 48 ${RK_PLAT}/common/rockchip_gicv2.c 49 50PLAT_BL_COMMON_SOURCES := ${XLAT_TABLES_LIB_SRCS} \ 51 common/desc_image_load.c \ 52 lib/bl_aux_params/bl_aux_params.c \ 53 plat/common/aarch64/crash_console_helpers.S \ 54 plat/common/plat_psci_common.c 55 56ifneq (${ENABLE_STACK_PROTECTOR},0) 57PLAT_BL_COMMON_SOURCES += ${RK_PLAT_COMMON}/rockchip_stack_protector.c 58endif 59 60BL31_SOURCES += ${RK_GIC_SOURCES} \ 61 drivers/arm/cci/cci.c \ 62 drivers/ti/uart/aarch64/16550_console.S \ 63 drivers/delay_timer/delay_timer.c \ 64 drivers/delay_timer/generic_delay_timer.c \ 65 drivers/scmi-msg/base.c \ 66 drivers/scmi-msg/clock.c \ 67 drivers/scmi-msg/entry.c \ 68 drivers/scmi-msg/reset_domain.c \ 69 drivers/scmi-msg/smt.c \ 70 lib/cpus/aarch64/cortex_a53.S \ 71 lib/cpus/aarch64/cortex_a72.S \ 72 $(LIBFDT_SRCS) \ 73 ${RK_PLAT_COMMON}/aarch64/plat_helpers.S \ 74 ${RK_PLAT_COMMON}/aarch64/platform_common.c \ 75 ${RK_PLAT_COMMON}/bl31_plat_setup.c \ 76 ${RK_PLAT_COMMON}/plat_pm.c \ 77 ${RK_PLAT_COMMON}/plat_pm_helpers.c \ 78 ${RK_PLAT_COMMON}/plat_topology.c \ 79 ${RK_PLAT_COMMON}/rockchip_sip_svc.c \ 80 ${RK_PLAT_COMMON}/params_setup.c \ 81 ${RK_PLAT_COMMON}/pmusram/cpus_on_fixed_addr.S \ 82 ${RK_PLAT_COMMON}/rockchip_sip_svc.c \ 83 ${RK_PLAT_COMMON}/scmi/rockchip_common_clock.c \ 84 ${RK_PLAT_COMMON}/scmi/scmi.c \ 85 ${RK_PLAT_COMMON}/scmi/scmi_clock.c \ 86 ${RK_PLAT_COMMON}/scmi/scmi_rstd.c \ 87 ${RK_PLAT_SOC}/scmi/rk3576_clk.c \ 88 ${RK_PLAT_SOC}/plat_sip_calls.c \ 89 ${RK_PLAT_SOC}/drivers/dmc/suspend.c \ 90 ${RK_PLAT_SOC}/drivers/pmu/pmu.c \ 91 ${RK_PLAT_SOC}/drivers/pmu/pm_pd_regs.c \ 92 ${RK_PLAT_SOC}/drivers/secure/firewall.c \ 93 ${RK_PLAT_SOC}/drivers/secure/secure.c \ 94 ${RK_PLAT_SOC}/drivers/soc/soc.c 95 96# Enable workarounds for selected Cortex-A53 errata 97ERRATA_A53_835769 := 1 98ERRATA_A53_843419 := 1 99ERRATA_A53_855873 := 1 100ERRATA_A53_1530924 := 1 101 102ERRATA_A72_1319367 := 1 103 104ENABLE_PLAT_COMPAT := 0 105MULTI_CONSOLE_API := 1 106CTX_INCLUDE_EL2_REGS := 0 107GICV2_G0_FOR_EL3 := 1 108CTX_INCLUDE_AARCH32_REGS := 0 109 110# Do not enable SVE 111ENABLE_SVE_FOR_NS := 0 112 113WORKAROUND_CVE_2017_5715 := 0 114 115$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 116