xref: /rk3399_ARM-atf/plat/rockchip/rk3576/platform.mk (revision 036935a8144b9c4b9f95f249ff4384945b846d40)
1*036935a8SXiaoDong Huang#
2*036935a8SXiaoDong Huang# Copyright (c) 2025, ARM Limited and Contributors. All rights reserved.
3*036935a8SXiaoDong Huang#
4*036935a8SXiaoDong Huang# SPDX-License-Identifier: BSD-3-Clause
5*036935a8SXiaoDong Huang#
6*036935a8SXiaoDong Huang
7*036935a8SXiaoDong HuangRK_PLAT			:=	plat/rockchip
8*036935a8SXiaoDong HuangRK_PLAT_SOC		:=	${RK_PLAT}/${PLAT}
9*036935a8SXiaoDong HuangRK_PLAT_COMMON		:=	${RK_PLAT}/common
10*036935a8SXiaoDong Huang
11*036935a8SXiaoDong HuangDISABLE_BIN_GENERATION	:=	1
12*036935a8SXiaoDong Huang
13*036935a8SXiaoDong Huanginclude drivers/arm/gic/v2/gicv2.mk
14*036935a8SXiaoDong Huanginclude lib/libfdt/libfdt.mk
15*036935a8SXiaoDong Huanginclude lib/xlat_tables_v2/xlat_tables.mk
16*036935a8SXiaoDong Huang
17*036935a8SXiaoDong HuangPLAT_INCLUDES		:=	-Idrivers/arm/gic/common/			\
18*036935a8SXiaoDong Huang				-Idrivers/arm/gic/v2/				\
19*036935a8SXiaoDong Huang				-Idrivers/scmi-msg/				\
20*036935a8SXiaoDong Huang				-Iinclude/bl31					\
21*036935a8SXiaoDong Huang				-Iinclude/common				\
22*036935a8SXiaoDong Huang				-Iinclude/drivers				\
23*036935a8SXiaoDong Huang				-Iinclude/drivers/arm				\
24*036935a8SXiaoDong Huang				-Iinclude/drivers/io				\
25*036935a8SXiaoDong Huang				-Iinclude/drivers/ti/uart			\
26*036935a8SXiaoDong Huang				-Iinclude/lib					\
27*036935a8SXiaoDong Huang				-Iinclude/lib/cpus/${ARCH}			\
28*036935a8SXiaoDong Huang				-Iinclude/lib/el3_runtime			\
29*036935a8SXiaoDong Huang				-Iinclude/lib/psci				\
30*036935a8SXiaoDong Huang				-Iinclude/plat/common				\
31*036935a8SXiaoDong Huang				-Iinclude/services				\
32*036935a8SXiaoDong Huang				-I${RK_PLAT_COMMON}/				\
33*036935a8SXiaoDong Huang				-I${RK_PLAT_COMMON}/pmusram/			\
34*036935a8SXiaoDong Huang				-I${RK_PLAT_COMMON}/include/			\
35*036935a8SXiaoDong Huang				-I${RK_PLAT_COMMON}/drivers/pmu/		\
36*036935a8SXiaoDong Huang				-I${RK_PLAT_COMMON}/drivers/parameter/		\
37*036935a8SXiaoDong Huang				-I${RK_PLAT_COMMON}/scmi/			\
38*036935a8SXiaoDong Huang				-I${RK_PLAT_SOC}/				\
39*036935a8SXiaoDong Huang				-I${RK_PLAT_SOC}/drivers/dmc/			\
40*036935a8SXiaoDong Huang				-I${RK_PLAT_SOC}/drivers/pmu/			\
41*036935a8SXiaoDong Huang				-I${RK_PLAT_SOC}/drivers/secure/		\
42*036935a8SXiaoDong Huang				-I${RK_PLAT_SOC}/drivers/soc/			\
43*036935a8SXiaoDong Huang				-I${RK_PLAT_SOC}/include/			\
44*036935a8SXiaoDong Huang				-I${RK_PLAT_SOC}/scmi/
45*036935a8SXiaoDong Huang
46*036935a8SXiaoDong HuangRK_GIC_SOURCES		:=	${GICV2_SOURCES}				\
47*036935a8SXiaoDong Huang				plat/common/plat_gicv2.c			\
48*036935a8SXiaoDong Huang				${RK_PLAT}/common/rockchip_gicv2.c
49*036935a8SXiaoDong Huang
50*036935a8SXiaoDong HuangPLAT_BL_COMMON_SOURCES	:=	${XLAT_TABLES_LIB_SRCS}				\
51*036935a8SXiaoDong Huang				common/desc_image_load.c			\
52*036935a8SXiaoDong Huang				lib/bl_aux_params/bl_aux_params.c		\
53*036935a8SXiaoDong Huang				plat/common/aarch64/crash_console_helpers.S	\
54*036935a8SXiaoDong Huang				plat/common/plat_psci_common.c
55*036935a8SXiaoDong Huang
56*036935a8SXiaoDong Huangifneq (${ENABLE_STACK_PROTECTOR},0)
57*036935a8SXiaoDong HuangPLAT_BL_COMMON_SOURCES	+=	${RK_PLAT_COMMON}/rockchip_stack_protector.c
58*036935a8SXiaoDong Huangendif
59*036935a8SXiaoDong Huang
60*036935a8SXiaoDong HuangBL31_SOURCES		+=	${RK_GIC_SOURCES}				\
61*036935a8SXiaoDong Huang				drivers/arm/cci/cci.c				\
62*036935a8SXiaoDong Huang				drivers/ti/uart/aarch64/16550_console.S		\
63*036935a8SXiaoDong Huang				drivers/delay_timer/delay_timer.c		\
64*036935a8SXiaoDong Huang				drivers/delay_timer/generic_delay_timer.c	\
65*036935a8SXiaoDong Huang				drivers/scmi-msg/base.c				\
66*036935a8SXiaoDong Huang				drivers/scmi-msg/clock.c			\
67*036935a8SXiaoDong Huang				drivers/scmi-msg/entry.c			\
68*036935a8SXiaoDong Huang				drivers/scmi-msg/reset_domain.c			\
69*036935a8SXiaoDong Huang				drivers/scmi-msg/smt.c				\
70*036935a8SXiaoDong Huang				lib/cpus/aarch64/cortex_a53.S			\
71*036935a8SXiaoDong Huang				lib/cpus/aarch64/cortex_a72.S			\
72*036935a8SXiaoDong Huang				$(LIBFDT_SRCS)					\
73*036935a8SXiaoDong Huang				${RK_PLAT_COMMON}/aarch64/plat_helpers.S	\
74*036935a8SXiaoDong Huang				${RK_PLAT_COMMON}/aarch64/platform_common.c	\
75*036935a8SXiaoDong Huang				${RK_PLAT_COMMON}/bl31_plat_setup.c		\
76*036935a8SXiaoDong Huang				${RK_PLAT_COMMON}/plat_pm.c			\
77*036935a8SXiaoDong Huang				${RK_PLAT_COMMON}/plat_pm_helpers.c		\
78*036935a8SXiaoDong Huang				${RK_PLAT_COMMON}/plat_topology.c		\
79*036935a8SXiaoDong Huang				${RK_PLAT_COMMON}/rockchip_sip_svc.c		\
80*036935a8SXiaoDong Huang				${RK_PLAT_COMMON}/params_setup.c		\
81*036935a8SXiaoDong Huang				${RK_PLAT_COMMON}/pmusram/cpus_on_fixed_addr.S	\
82*036935a8SXiaoDong Huang				${RK_PLAT_COMMON}/rockchip_sip_svc.c		\
83*036935a8SXiaoDong Huang				${RK_PLAT_COMMON}/scmi/rockchip_common_clock.c	\
84*036935a8SXiaoDong Huang				${RK_PLAT_COMMON}/scmi/scmi.c			\
85*036935a8SXiaoDong Huang				${RK_PLAT_COMMON}/scmi/scmi_clock.c		\
86*036935a8SXiaoDong Huang				${RK_PLAT_COMMON}/scmi/scmi_rstd.c		\
87*036935a8SXiaoDong Huang				${RK_PLAT_SOC}/scmi/rk3576_clk.c		\
88*036935a8SXiaoDong Huang				${RK_PLAT_SOC}/plat_sip_calls.c         	\
89*036935a8SXiaoDong Huang				${RK_PLAT_SOC}/drivers/dmc/suspend.c		\
90*036935a8SXiaoDong Huang				${RK_PLAT_SOC}/drivers/pmu/pmu.c		\
91*036935a8SXiaoDong Huang				${RK_PLAT_SOC}/drivers/pmu/pm_pd_regs.c 	\
92*036935a8SXiaoDong Huang				${RK_PLAT_SOC}/drivers/secure/firewall.c	\
93*036935a8SXiaoDong Huang				${RK_PLAT_SOC}/drivers/secure/secure.c		\
94*036935a8SXiaoDong Huang				${RK_PLAT_SOC}/drivers/soc/soc.c
95*036935a8SXiaoDong Huang
96*036935a8SXiaoDong Huang# Enable workarounds for selected Cortex-A53 errata
97*036935a8SXiaoDong HuangERRATA_A53_835769		:=	1
98*036935a8SXiaoDong HuangERRATA_A53_843419		:=	1
99*036935a8SXiaoDong HuangERRATA_A53_855873		:=	1
100*036935a8SXiaoDong HuangERRATA_A53_1530924		:=	1
101*036935a8SXiaoDong Huang
102*036935a8SXiaoDong HuangERRATA_A72_1319367		:=	1
103*036935a8SXiaoDong Huang
104*036935a8SXiaoDong HuangENABLE_PLAT_COMPAT		:=	0
105*036935a8SXiaoDong HuangMULTI_CONSOLE_API		:=	1
106*036935a8SXiaoDong HuangCTX_INCLUDE_EL2_REGS		:=	0
107*036935a8SXiaoDong HuangGICV2_G0_FOR_EL3		:=	1
108*036935a8SXiaoDong HuangCTX_INCLUDE_AARCH32_REGS	:=	0
109*036935a8SXiaoDong Huang
110*036935a8SXiaoDong Huang# Do not enable SVE
111*036935a8SXiaoDong HuangENABLE_SVE_FOR_NS		:=	0
112*036935a8SXiaoDong Huang
113*036935a8SXiaoDong HuangWORKAROUND_CVE_2017_5715	:=	0
114*036935a8SXiaoDong Huang
115*036935a8SXiaoDong Huang$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
116