xref: /rk3399_ARM-atf/plat/rockchip/rk3576/drivers/secure/secure.c (revision 52e486f6a6192bd18d36cdcbc35c59092eefc810)
1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3  * Copyright (c) 2025, Rockchip Electronics Co., Ltd.
4  */
5 
6 #include <assert.h>
7 #include <lib/mmio.h>
8 
9 #include <platform_def.h>
10 
11 #include <secure.h>
12 #include <soc.h>
13 
14 static void secure_timer_init(void)
15 {
16 	/* gpu's cntvalue comes from stimer1 channel_5 */
17 	mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_CONTROL_REG,
18 		      TIMER_DIS);
19 
20 	mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_LOAD_COUNT0, 0xffffffff);
21 	mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_LOAD_COUNT1, 0xffffffff);
22 
23 	/* auto reload & enable the timer */
24 	mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_CONTROL_REG,
25 		      TIMER_EN | TIMER_FMODE);
26 }
27 
28 void secure_init(void)
29 {
30 	secure_timer_init();
31 	fw_init();
32 
33 	/* crypto secure controlled by crypto */
34 	mmio_write_32(SYS_SGRF_BASE + SYSSGRF_SOC_CON(0), BITS_WITH_WMASK(0, 0x1, 4));
35 	mmio_write_32(SYS_SGRF_BASE + SYSSGRF_SOC_CON(0), BITS_WITH_WMASK(0, 0x1, 5));
36 
37 	/* disable DP encryption mode */
38 	mmio_write_32(SYS_SGRF_BASE + SYSSGRF_SOC_CON(1), BITS_WITH_WMASK(1, 0x1, 14));
39 }
40