1# 2# Copyright (c) 2023, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7RK_PLAT := plat/rockchip 8RK_PLAT_SOC := ${RK_PLAT}/${PLAT} 9RK_PLAT_COMMON := ${RK_PLAT}/common 10 11DISABLE_BIN_GENERATION := 1 12GICV3_SUPPORT_GIC600 := 1 13include lib/coreboot/coreboot.mk 14include lib/libfdt/libfdt.mk 15include lib/xlat_tables_v2/xlat_tables.mk 16# GIC-600 configuration 17GICV3_IMPL := GIC600 18# Include GICv3 driver files 19include drivers/arm/gic/v3/gicv3.mk 20 21PLAT_INCLUDES := -Iinclude/bl31 \ 22 -Iinclude/common \ 23 -Iinclude/drivers \ 24 -Iinclude/drivers/arm \ 25 -Iinclude/drivers/auth \ 26 -Iinclude/drivers/io \ 27 -Iinclude/drivers/ti/uart \ 28 -Iinclude/lib \ 29 -Iinclude/lib/cpus/${ARCH} \ 30 -Iinclude/lib/el3_runtime \ 31 -Iinclude/lib/pmf \ 32 -Iinclude/lib/psci \ 33 -Iinclude/plat/common \ 34 -Iinclude/services \ 35 -Iinclude/plat/common/ \ 36 -Idrivers/arm/gic/v3/ \ 37 -I${RK_PLAT_COMMON}/ \ 38 -I${RK_PLAT_COMMON}/pmusram/ \ 39 -I${RK_PLAT_COMMON}/include/ \ 40 -I${RK_PLAT_COMMON}/drivers/pmu/ \ 41 -I${RK_PLAT_COMMON}/drivers/parameter/ \ 42 -I${RK_PLAT_SOC}/ \ 43 -I${RK_PLAT_SOC}/drivers/pmu/ \ 44 -I${RK_PLAT_SOC}/drivers/soc/ \ 45 -I${RK_PLAT_SOC}/include/ 46 47RK_GIC_SOURCES := ${GICV3_SOURCES} \ 48 plat/common/plat_gicv3.c \ 49 ${RK_PLAT}/common/rockchip_gicv3.c 50 51PLAT_BL_COMMON_SOURCES := ${XLAT_TABLES_LIB_SRCS} \ 52 common/desc_image_load.c \ 53 plat/common/aarch64/crash_console_helpers.S \ 54 lib/bl_aux_params/bl_aux_params.c \ 55 plat/common/plat_psci_common.c 56 57ifneq (${ENABLE_STACK_PROTECTOR},0) 58PLAT_BL_COMMON_SOURCES += ${RK_PLAT_COMMON}/rockchip_stack_protector.c 59endif 60 61BL31_SOURCES += ${RK_GIC_SOURCES} \ 62 drivers/arm/cci/cci.c \ 63 lib/cpus/aarch64/cortex_a55.S \ 64 drivers/ti/uart/aarch64/16550_console.S \ 65 drivers/delay_timer/delay_timer.c \ 66 drivers/delay_timer/generic_delay_timer.c \ 67 $(LIBFDT_SRCS) \ 68 ${RK_PLAT_COMMON}/aarch64/plat_helpers.S \ 69 ${RK_PLAT_COMMON}/bl31_plat_setup.c \ 70 ${RK_PLAT_COMMON}/params_setup.c \ 71 ${RK_PLAT_COMMON}/plat_pm.c \ 72 ${RK_PLAT_COMMON}/plat_topology.c \ 73 ${RK_PLAT_COMMON}/rockchip_sip_svc.c \ 74 ${RK_PLAT_COMMON}/pmusram/cpus_on_fixed_addr.S \ 75 ${RK_PLAT_COMMON}/drivers/parameter/ddr_parameter.c \ 76 ${RK_PLAT_COMMON}/aarch64/platform_common.c \ 77 ${RK_PLAT_SOC}/drivers/soc/soc.c \ 78 ${RK_PLAT_SOC}/drivers/pmu/pmu.c \ 79 ${RK_PLAT_SOC}/plat_sip_calls.c 80 81ENABLE_PLAT_COMPAT := 0 82MULTI_CONSOLE_API := 1 83# System coherency is managed in hardware 84HW_ASSISTED_COHERENCY := 1 85#Enable errata for cortex_a55 86ERRATA_A55_1530923 := 1 87 88# When building for systems with hardware-assisted coherency, there's no need to 89# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 90USE_COHERENT_MEM := 0 91 92$(eval $(call add_define,PLAT_SKIP_OPTEE_S_EL1_INT_REGISTER)) 93$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 94 95# Do not enable SVE 96ENABLE_SVE_FOR_NS := 0 97