1*9fd9f1d0Sshengfei Xu# 2*9fd9f1d0Sshengfei Xu# Copyright (c) 2023, ARM Limited and Contributors. All rights reserved. 3*9fd9f1d0Sshengfei Xu# 4*9fd9f1d0Sshengfei Xu# SPDX-License-Identifier: BSD-3-Clause 5*9fd9f1d0Sshengfei Xu# 6*9fd9f1d0Sshengfei Xu 7*9fd9f1d0Sshengfei XuRK_PLAT := plat/rockchip 8*9fd9f1d0Sshengfei XuRK_PLAT_SOC := ${RK_PLAT}/${PLAT} 9*9fd9f1d0Sshengfei XuRK_PLAT_COMMON := ${RK_PLAT}/common 10*9fd9f1d0Sshengfei Xu 11*9fd9f1d0Sshengfei XuDISABLE_BIN_GENERATION := 1 12*9fd9f1d0Sshengfei XuGICV3_SUPPORT_GIC600 := 1 13*9fd9f1d0Sshengfei Xuinclude lib/coreboot/coreboot.mk 14*9fd9f1d0Sshengfei Xuinclude lib/libfdt/libfdt.mk 15*9fd9f1d0Sshengfei Xuinclude lib/xlat_tables_v2/xlat_tables.mk 16*9fd9f1d0Sshengfei Xu# GIC-600 configuration 17*9fd9f1d0Sshengfei XuGICV3_IMPL := GIC600 18*9fd9f1d0Sshengfei Xu# Include GICv3 driver files 19*9fd9f1d0Sshengfei Xuinclude drivers/arm/gic/v3/gicv3.mk 20*9fd9f1d0Sshengfei Xu 21*9fd9f1d0Sshengfei XuPLAT_INCLUDES := -Iinclude/bl31 \ 22*9fd9f1d0Sshengfei Xu -Iinclude/common \ 23*9fd9f1d0Sshengfei Xu -Iinclude/drivers \ 24*9fd9f1d0Sshengfei Xu -Iinclude/drivers/arm \ 25*9fd9f1d0Sshengfei Xu -Iinclude/drivers/auth \ 26*9fd9f1d0Sshengfei Xu -Iinclude/drivers/io \ 27*9fd9f1d0Sshengfei Xu -Iinclude/drivers/ti/uart \ 28*9fd9f1d0Sshengfei Xu -Iinclude/lib \ 29*9fd9f1d0Sshengfei Xu -Iinclude/lib/cpus/${ARCH} \ 30*9fd9f1d0Sshengfei Xu -Iinclude/lib/el3_runtime \ 31*9fd9f1d0Sshengfei Xu -Iinclude/lib/pmf \ 32*9fd9f1d0Sshengfei Xu -Iinclude/lib/psci \ 33*9fd9f1d0Sshengfei Xu -Iinclude/plat/common \ 34*9fd9f1d0Sshengfei Xu -Iinclude/services \ 35*9fd9f1d0Sshengfei Xu -Iinclude/plat/common/ \ 36*9fd9f1d0Sshengfei Xu -Idrivers/arm/gic/v3/ \ 37*9fd9f1d0Sshengfei Xu -I${RK_PLAT_COMMON}/ \ 38*9fd9f1d0Sshengfei Xu -I${RK_PLAT_COMMON}/pmusram/ \ 39*9fd9f1d0Sshengfei Xu -I${RK_PLAT_COMMON}/include/ \ 40*9fd9f1d0Sshengfei Xu -I${RK_PLAT_COMMON}/drivers/pmu/ \ 41*9fd9f1d0Sshengfei Xu -I${RK_PLAT_COMMON}/drivers/parameter/ \ 42*9fd9f1d0Sshengfei Xu -I${RK_PLAT_SOC}/ \ 43*9fd9f1d0Sshengfei Xu -I${RK_PLAT_SOC}/drivers/pmu/ \ 44*9fd9f1d0Sshengfei Xu -I${RK_PLAT_SOC}/drivers/soc/ \ 45*9fd9f1d0Sshengfei Xu -I${RK_PLAT_SOC}/include/ 46*9fd9f1d0Sshengfei Xu 47*9fd9f1d0Sshengfei XuRK_GIC_SOURCES := ${GICV3_SOURCES} \ 48*9fd9f1d0Sshengfei Xu plat/common/plat_gicv3.c \ 49*9fd9f1d0Sshengfei Xu ${RK_PLAT}/common/rockchip_gicv3.c 50*9fd9f1d0Sshengfei Xu 51*9fd9f1d0Sshengfei XuPLAT_BL_COMMON_SOURCES := ${XLAT_TABLES_LIB_SRCS} \ 52*9fd9f1d0Sshengfei Xu common/desc_image_load.c \ 53*9fd9f1d0Sshengfei Xu plat/common/aarch64/crash_console_helpers.S \ 54*9fd9f1d0Sshengfei Xu lib/bl_aux_params/bl_aux_params.c \ 55*9fd9f1d0Sshengfei Xu plat/common/plat_psci_common.c 56*9fd9f1d0Sshengfei Xu 57*9fd9f1d0Sshengfei Xuifneq (${ENABLE_STACK_PROTECTOR},0) 58*9fd9f1d0Sshengfei XuPLAT_BL_COMMON_SOURCES += ${RK_PLAT_COMMON}/rockchip_stack_protector.c 59*9fd9f1d0Sshengfei Xuendif 60*9fd9f1d0Sshengfei Xu 61*9fd9f1d0Sshengfei XuBL31_SOURCES += ${RK_GIC_SOURCES} \ 62*9fd9f1d0Sshengfei Xu drivers/arm/cci/cci.c \ 63*9fd9f1d0Sshengfei Xu lib/cpus/aarch64/cortex_a55.S \ 64*9fd9f1d0Sshengfei Xu drivers/ti/uart/aarch64/16550_console.S \ 65*9fd9f1d0Sshengfei Xu drivers/delay_timer/delay_timer.c \ 66*9fd9f1d0Sshengfei Xu drivers/delay_timer/generic_delay_timer.c \ 67*9fd9f1d0Sshengfei Xu $(LIBFDT_SRCS) \ 68*9fd9f1d0Sshengfei Xu ${RK_PLAT_COMMON}/aarch64/plat_helpers.S \ 69*9fd9f1d0Sshengfei Xu ${RK_PLAT_COMMON}/bl31_plat_setup.c \ 70*9fd9f1d0Sshengfei Xu ${RK_PLAT_COMMON}/params_setup.c \ 71*9fd9f1d0Sshengfei Xu ${RK_PLAT_COMMON}/plat_pm.c \ 72*9fd9f1d0Sshengfei Xu ${RK_PLAT_COMMON}/plat_topology.c \ 73*9fd9f1d0Sshengfei Xu ${RK_PLAT_COMMON}/rockchip_sip_svc.c \ 74*9fd9f1d0Sshengfei Xu ${RK_PLAT_COMMON}/pmusram/cpus_on_fixed_addr.S \ 75*9fd9f1d0Sshengfei Xu ${RK_PLAT_COMMON}/drivers/parameter/ddr_parameter.c \ 76*9fd9f1d0Sshengfei Xu ${RK_PLAT_COMMON}/aarch64/platform_common.c \ 77*9fd9f1d0Sshengfei Xu ${RK_PLAT_SOC}/drivers/soc/soc.c \ 78*9fd9f1d0Sshengfei Xu ${RK_PLAT_SOC}/drivers/pmu/pmu.c \ 79*9fd9f1d0Sshengfei Xu ${RK_PLAT_SOC}/plat_sip_calls.c 80*9fd9f1d0Sshengfei Xu 81*9fd9f1d0Sshengfei XuENABLE_PLAT_COMPAT := 0 82*9fd9f1d0Sshengfei XuMULTI_CONSOLE_API := 1 83*9fd9f1d0Sshengfei Xu# System coherency is managed in hardware 84*9fd9f1d0Sshengfei XuHW_ASSISTED_COHERENCY := 1 85*9fd9f1d0Sshengfei Xu#Enable errata for cortex_a55 86*9fd9f1d0Sshengfei XuERRATA_A55_1530923 := 1 87*9fd9f1d0Sshengfei Xu 88*9fd9f1d0Sshengfei Xu# When building for systems with hardware-assisted coherency, there's no need to 89*9fd9f1d0Sshengfei Xu# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 90*9fd9f1d0Sshengfei XuUSE_COHERENT_MEM := 0 91*9fd9f1d0Sshengfei Xu 92*9fd9f1d0Sshengfei Xu$(eval $(call add_define,PLAT_SKIP_OPTEE_S_EL1_INT_REGISTER)) 93*9fd9f1d0Sshengfei Xu$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 94*9fd9f1d0Sshengfei Xu 95*9fd9f1d0Sshengfei Xu# Do not enable SVE 96*9fd9f1d0Sshengfei XuENABLE_SVE_FOR_NS := 0 97