19fd9f1d0Sshengfei Xu /* 2*4e1ccc60SShengfei Xu * Copyright (c) 2023-2025, ARM Limited and Contributors. All rights reserved. 39fd9f1d0Sshengfei Xu * 49fd9f1d0Sshengfei Xu * SPDX-License-Identifier: BSD-3-Clause 59fd9f1d0Sshengfei Xu */ 69fd9f1d0Sshengfei Xu 79fd9f1d0Sshengfei Xu #include <assert.h> 89fd9f1d0Sshengfei Xu #include <errno.h> 99fd9f1d0Sshengfei Xu 109fd9f1d0Sshengfei Xu #include <common/debug.h> 119fd9f1d0Sshengfei Xu #include <common/runtime_svc.h> 12*4e1ccc60SShengfei Xu #include <drivers/scmi-msg.h> 139fd9f1d0Sshengfei Xu 149fd9f1d0Sshengfei Xu #include <plat_sip_calls.h> 159fd9f1d0Sshengfei Xu #include <rockchip_sip_svc.h> 169fd9f1d0Sshengfei Xu 179fd9f1d0Sshengfei Xu uintptr_t rockchip_plat_sip_handler(uint32_t smc_fid, 189fd9f1d0Sshengfei Xu u_register_t x1, 199fd9f1d0Sshengfei Xu u_register_t x2, 209fd9f1d0Sshengfei Xu u_register_t x3, 219fd9f1d0Sshengfei Xu u_register_t x4, 229fd9f1d0Sshengfei Xu void *cookie, 239fd9f1d0Sshengfei Xu void *handle, 249fd9f1d0Sshengfei Xu u_register_t flags) 259fd9f1d0Sshengfei Xu { 26*4e1ccc60SShengfei Xu switch (smc_fid) { 27*4e1ccc60SShengfei Xu case RK_SIP_SCMI_AGENT0: 28*4e1ccc60SShengfei Xu scmi_smt_fastcall_smc_entry(0); 29*4e1ccc60SShengfei Xu SMC_RET1(handle, 0); 30*4e1ccc60SShengfei Xu default: 319fd9f1d0Sshengfei Xu ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); 329fd9f1d0Sshengfei Xu SMC_RET1(handle, SMC_UNK); 339fd9f1d0Sshengfei Xu } 34*4e1ccc60SShengfei Xu } 35