1/* 2 * Copyright (c) 2023, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6#ifndef ROCKCHIP_PLAT_LD_S 7#define ROCKCHIP_PLAT_LD_S 8 9MEMORY { 10 PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE 11} 12 13SECTIONS 14{ 15 . = PMUSRAM_BASE; 16 17 /* 18 * pmu_cpuson_entrypoint request address 19 * align 64K when resume, so put it in the 20 * start of pmusram 21 */ 22 .pmusram : { 23 ASSERT(. == ALIGN(64 * 1024), 24 ".pmusram.entry request 64K aligned."); 25 KEEP(*(.pmusram.entry)) 26 27 __bl31_pmusram_text_start = .; 28 *(.pmusram.text) 29 *(.pmusram.rodata) 30 __bl31_pmusram_text_end = .; 31 __bl31_pmusram_data_start = .; 32 *(.pmusram.data) 33 __bl31_pmusram_data_end = .; 34 } >PMUSRAM 35} 36#endif /* ROCKCHIP_PLAT_LD_S */ 37