1 /* 2 * Copyright (c) 2024-2025, Rockchip Electronics Co., Ltd. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef OTP_H 8 #define OTP_H 9 10 #define WRITE_MASK (16) 11 12 #define OTP_MAX_SIZE 512 13 #define OTP_MAX_BYTE_SIZE (OTP_MAX_SIZE * 2) 14 #define OTP_S_SIZE 448 15 #define OTP_S_BYTE_SIZE (OTP_S_SIZE * 2) 16 #define OTP_NS_SIZE 64 17 #define OTP_NS_BYTE_SIZE (OTP_NS_SIZE * 2) 18 #define OTP_PROG_MASK 0 19 #define OTP_PROG_MASK_NUM 32 20 #define OTP_READ_MASK 0x0100 21 #define OTP_READ_MASK_NUM 32 22 #define IS_READ_MASK 0 23 #define IS_WRITE_MASK 1 24 #define IS_DISBALE_MASK 0 25 #define IS_ENABLE_MASK 1 26 #define OTP_MASK_BYPASS 0x200 27 28 /* CRU controller register */ 29 #define CLK_NS_OTP_USER_EN (1 << 11) 30 #define CLK_NS_OTP_SBPI_EN (1 << 10) 31 #define PCLK_NS_OTP_EN (1 << 9) 32 #define PCLK_PHY_OTP_EN (1 << 13) 33 #define OTP_PHY_SRSTN (1u << 15) 34 35 /* SCRU controller register */ 36 #define CLK_S_OTP_USER_EN (1 << 7) 37 #define CLK_S_OTP_SBPI_EN (1 << 6) 38 #define PCLK_S_OTP_EN (1 << 5) 39 40 /* SGRF controller register */ 41 #define SGRF_CON_OTP_CKE (1 << 2) 42 #define SGRF_CON_OTP_SECURE (1 << 1) 43 44 /* OTP controller register */ 45 #define REG_OTPC_SBPI_CTRL (0x0020) 46 #define SBPI_DEV_ID_SHIFT (8) 47 #define SBPI_DEV_ID_MASK (0xFF) 48 #define SBPI_CS_DEASSERT (1 << 3) 49 #define SBPI_CS_AUTO (1 << 2) 50 #define SBPI_SP (1 << 1) 51 #define SBPI_ENABLE (1 << 0) 52 #define REG_OTPC_SBPI_CMD_VALID_PRE (0x0024) 53 #define REG_OTPC_SBPI_CS_VALID_PRE (0x0028) 54 #define REG_OTPC_SBPI_STATUS (0x002C) 55 #define REG_OTPC_USER_CTRL (0x0100) 56 #define USER_PD (1 << 1) 57 #define USER_DCTRL (1 << 0) 58 #define REG_OTPC_USER_ADDR (0x0104) 59 #define REG_OTPC_USER_ENABLE (0x0108) 60 #define USER_ENABLE (1 << 0) 61 #define REG_OTPC_USER_STATUS (0x0110) 62 #define REG_OTPC_USER_QP (0x0120) 63 #define REG_OTPC_USER_Q (0x0124) 64 #define REG_OTPC_USER_QSR (0x0128) 65 #define REG_OTPC_USER_QRR (0x012C) 66 #define REG_OTPC_SBPI_CMD_OFFSET(n) (0x1000 + (n << 2)) 67 #define REG_OTPC_SBPI_READ_DATA_BASE (0x2000) 68 #define REG_OTPC_INT_CON (0x0300) 69 #define REG_OTPC_INT_STATUS (0x0304) 70 71 #define REG_KEY_READER_CONFIG 0x00 72 #define OTP_KEY_ACCESS_START (1 << 0) 73 #define SBPI_VAILI_COMMAND(n) (0xffff0000 | n) 74 75 int rk_otp_read(uint32_t addr, uint32_t length, 76 uint16_t *buf, bool is_need_ecc); 77 int rk_otp_ns_ecc_flag(uint32_t addr); 78 #endif /* OTP_H */ 79