xref: /rk3399_ARM-atf/plat/rockchip/rk3399/platform.mk (revision fd7b287cbe9147ca9e07dd9f30c49c58bbdd92a8)
1#
2# Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7RK_PLAT		:=	plat/rockchip
8RK_PLAT_SOC	:=	${RK_PLAT}/${PLAT}
9RK_PLAT_COMMON	:=	${RK_PLAT}/common
10
11include lib/libfdt/libfdt.mk
12
13PLAT_INCLUDES		:=	-I${RK_PLAT_COMMON}/			\
14				-I${RK_PLAT_COMMON}/include/		\
15				-I${RK_PLAT_COMMON}/pmusram		\
16				-I${RK_PLAT_COMMON}/drivers/pmu/	\
17				-I${RK_PLAT_SOC}/			\
18				-I${RK_PLAT_SOC}/drivers/pmu/		\
19				-I${RK_PLAT_SOC}/drivers/pwm/		\
20				-I${RK_PLAT_SOC}/drivers/secure/	\
21				-I${RK_PLAT_SOC}/drivers/soc/		\
22				-I${RK_PLAT_SOC}/drivers/dram/		\
23				-I${RK_PLAT_SOC}/drivers/dp/		\
24				-I${RK_PLAT_SOC}/include/		\
25				-I${RK_PLAT_SOC}/include/shared/	\
26
27RK_GIC_SOURCES		:=	drivers/arm/gic/common/gic_common.c	\
28				drivers/arm/gic/v3/arm_gicv3_common.c	\
29				drivers/arm/gic/v3/gic500.c		\
30				drivers/arm/gic/v3/gicv3_main.c		\
31				drivers/arm/gic/v3/gicv3_helpers.c	\
32				plat/common/plat_gicv3.c		\
33				${RK_PLAT}/common/rockchip_gicv3.c
34
35PLAT_BL_COMMON_SOURCES	:=	lib/xlat_tables/xlat_tables_common.c	\
36				lib/xlat_tables/aarch64/xlat_tables.c	\
37				plat/common/aarch64/crash_console_helpers.S \
38				plat/common/plat_psci_common.c
39
40BL31_SOURCES	+=	${RK_GIC_SOURCES}				\
41			drivers/arm/cci/cci.c				\
42			drivers/ti/uart/aarch64/16550_console.S		\
43			drivers/delay_timer/delay_timer.c		\
44			drivers/delay_timer/generic_delay_timer.c	\
45			drivers/gpio/gpio.c				\
46			lib/cpus/aarch64/cortex_a53.S			\
47			lib/cpus/aarch64/cortex_a72.S			\
48			$(LIBFDT_SRCS)					\
49			${RK_PLAT_COMMON}/aarch64/plat_helpers.S	\
50			${RK_PLAT_COMMON}/bl31_plat_setup.c		\
51			${RK_PLAT_COMMON}/params_setup.c		\
52			${RK_PLAT_COMMON}/pmusram/pmu_sram_cpus_on.S	\
53			${RK_PLAT_COMMON}/plat_pm.c			\
54			${RK_PLAT_COMMON}/plat_topology.c		\
55			${RK_PLAT_COMMON}/aarch64/platform_common.c	\
56			${RK_PLAT_COMMON}/rockchip_sip_svc.c		\
57			${RK_PLAT_SOC}/plat_sip_calls.c			\
58			${RK_PLAT_SOC}/drivers/dp/cdn_dp.c		\
59			${RK_PLAT_SOC}/drivers/gpio/rk3399_gpio.c	\
60			${RK_PLAT_SOC}/drivers/pmu/pmu.c		\
61			${RK_PLAT_SOC}/drivers/pmu/pmu_fw.c		\
62			${RK_PLAT_SOC}/drivers/pmu/m0_ctl.c		\
63			${RK_PLAT_SOC}/drivers/pwm/pwm.c		\
64			${RK_PLAT_SOC}/drivers/secure/secure.c		\
65			${RK_PLAT_SOC}/drivers/soc/soc.c		\
66			${RK_PLAT_SOC}/drivers/dram/dfs.c		\
67			${RK_PLAT_SOC}/drivers/dram/dram.c		\
68			${RK_PLAT_SOC}/drivers/dram/dram_spec_timing.c	\
69			${RK_PLAT_SOC}/drivers/dram/suspend.c
70
71MULTI_CONSOLE_API	:=	1
72
73include lib/coreboot/coreboot.mk
74
75$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
76
77# Enable workarounds for selected Cortex-A53 erratas.
78ERRATA_A53_855873	:=	1
79
80# M0 source build
81PLAT_M0                 :=      ${PLAT}m0
82BUILD_M0		:=	${BUILD_PLAT}/m0
83
84RK3399M0FW=${BUILD_M0}/${PLAT_M0}.bin
85$(eval $(call add_define,RK3399M0FW))
86
87RK3399M0PMUFW=${BUILD_M0}/${PLAT_M0}pmu.bin
88$(eval $(call add_define,RK3399M0PMUFW))
89
90HDCPFW=${RK_PLAT_SOC}/drivers/dp/hdcp.bin
91$(eval $(call add_define,HDCPFW))
92
93# CCACHE_EXTRAFILES is needed because ccache doesn't handle .incbin
94export CCACHE_EXTRAFILES
95${BUILD_PLAT}/bl31/pmu_fw.o: CCACHE_EXTRAFILES=$(RK3399M0FW):$(RK3399M0PMUFW)
96${RK_PLAT_SOC}/drivers/pmu/pmu_fw.c: $(RK3399M0FW)
97
98${BUILD_PLAT}/bl31/cdn_dp.o: CCACHE_EXTRAFILES=$(HDCPFW)
99${RK_PLAT_SOC}/drivers/dp/cdn_dp.c: $(HDCPFW)
100
101$(eval $(call MAKE_PREREQ_DIR,${BUILD_M0},${BUILD_PLAT}))
102.PHONY: $(RK3399M0FW)
103$(RK3399M0FW): | ${BUILD_M0}
104	$(MAKE) -C ${RK_PLAT_SOC}/drivers/m0 BUILD=$(abspath ${BUILD_PLAT}/m0)
105
106# Do not enable SVE
107ENABLE_SVE_FOR_NS	:=	0
108