1*1760db68SCaesar Wang /* 2*1760db68SCaesar Wang * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3*1760db68SCaesar Wang * 4*1760db68SCaesar Wang * Redistribution and use in source and binary forms, with or without 5*1760db68SCaesar Wang * modification, are permitted provided that the following conditions are met: 6*1760db68SCaesar Wang * 7*1760db68SCaesar Wang * 1. Redistributions of source code must retain the above copyright notice, 8*1760db68SCaesar Wang * this list of conditions and the following disclaimer. 9*1760db68SCaesar Wang * 10*1760db68SCaesar Wang * 2. Redistributions in binary form must reproduce the above copyright notice, 11*1760db68SCaesar Wang * this list of conditions and the following disclaimer in the documentation 12*1760db68SCaesar Wang * and/or other materials provided with the distribution. 13*1760db68SCaesar Wang * 14*1760db68SCaesar Wang * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 15*1760db68SCaesar Wang * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16*1760db68SCaesar Wang * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17*1760db68SCaesar Wang * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 18*1760db68SCaesar Wang * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 19*1760db68SCaesar Wang * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 20*1760db68SCaesar Wang * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 21*1760db68SCaesar Wang * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 22*1760db68SCaesar Wang * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 23*1760db68SCaesar Wang * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 24*1760db68SCaesar Wang * POSSIBILITY OF SUCH DAMAGE. 25*1760db68SCaesar Wang */ 26*1760db68SCaesar Wang 27*1760db68SCaesar Wang #include <debug.h> 28*1760db68SCaesar Wang #include <mmio.h> 29*1760db68SCaesar Wang #include <plat_sip_calls.h> 30*1760db68SCaesar Wang #include <rockchip_sip_svc.h> 31*1760db68SCaesar Wang #include <runtime_svc.h> 32*1760db68SCaesar Wang 33*1760db68SCaesar Wang uint64_t rockchip_plat_sip_handler(uint32_t smc_fid, 34*1760db68SCaesar Wang uint64_t x1, 35*1760db68SCaesar Wang uint64_t x2, 36*1760db68SCaesar Wang uint64_t x3, 37*1760db68SCaesar Wang uint64_t x4, 38*1760db68SCaesar Wang void *cookie, 39*1760db68SCaesar Wang void *handle, 40*1760db68SCaesar Wang uint64_t flags) 41*1760db68SCaesar Wang { 42*1760db68SCaesar Wang switch (smc_fid) { 43*1760db68SCaesar Wang default: 44*1760db68SCaesar Wang ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); 45*1760db68SCaesar Wang SMC_RET1(handle, SMC_UNK); 46*1760db68SCaesar Wang } 47*1760db68SCaesar Wang } 48