xref: /rk3399_ARM-atf/plat/rockchip/rk3399/include/shared/m0_param.h (revision 82cb2c1ad9897473743f08437d0a3995bed561b9)
1977001aaSXing Zheng /*
2977001aaSXing Zheng  * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3977001aaSXing Zheng  *
4*82cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
5977001aaSXing Zheng  */
6977001aaSXing Zheng 
7977001aaSXing Zheng #ifndef __M0_PARAM_H__
8977001aaSXing Zheng #define __M0_PARAM_H__
9977001aaSXing Zheng 
10977001aaSXing Zheng #ifndef __LINKER__
11977001aaSXing Zheng enum {
12977001aaSXing Zheng 	M0_FUNC_SUSPEND = 0,
13977001aaSXing Zheng 	M0_FUNC_DRAM	= 1,
14977001aaSXing Zheng };
15977001aaSXing Zheng #endif /* __LINKER__ */
16977001aaSXing Zheng 
17977001aaSXing Zheng #define PARAM_ADDR		0xc0
18977001aaSXing Zheng 
19977001aaSXing Zheng #define PARAM_M0_FUNC		0x00
20977001aaSXing Zheng #define PARAM_DRAM_FREQ		0x04
21977001aaSXing Zheng #define PARAM_DPLL_CON0		0x08
22977001aaSXing Zheng #define PARAM_DPLL_CON1		0x0c
23977001aaSXing Zheng #define PARAM_DPLL_CON2		0x10
24977001aaSXing Zheng #define PARAM_DPLL_CON3		0x14
25977001aaSXing Zheng #define PARAM_DPLL_CON4		0x18
26977001aaSXing Zheng #define PARAM_DPLL_CON5		0x1c
27977001aaSXing Zheng #define PARAM_FREQ_SELECT	0x20
28977001aaSXing Zheng #define PARAM_M0_DONE		0x24
29977001aaSXing Zheng #define PARAM_M0_SIZE		0x28
30977001aaSXing Zheng #define M0_DONE_FLAG		0xf59ec39a
31977001aaSXing Zheng 
32977001aaSXing Zheng #endif /*__M0_PARAM_H__*/
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