1ae7a9352SXing Zheng /* 2ae7a9352SXing Zheng * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3ae7a9352SXing Zheng * 4*82cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5ae7a9352SXing Zheng */ 6ae7a9352SXing Zheng 7ae7a9352SXing Zheng #ifndef __PLAT_ROCKCHIP_RK3399_INCLUDE_SHARED_BL31_PARAM_H__ 8ae7a9352SXing Zheng #define __PLAT_ROCKCHIP_RK3399_INCLUDE_SHARED_BL31_PARAM_H__ 9ae7a9352SXing Zheng 10ae7a9352SXing Zheng /******************************************************************************* 11ae7a9352SXing Zheng * Platform memory map related constants 12ae7a9352SXing Zheng ******************************************************************************/ 13ae7a9352SXing Zheng /* TF text, ro, rw, Size: 1MB */ 14ae7a9352SXing Zheng #define TZRAM_BASE (0x0) 15ae7a9352SXing Zheng #define TZRAM_SIZE (0x100000) 16ae7a9352SXing Zheng 17ae7a9352SXing Zheng /******************************************************************************* 18ae7a9352SXing Zheng * BL31 specific defines. 19ae7a9352SXing Zheng ******************************************************************************/ 20ae7a9352SXing Zheng /* 21ae7a9352SXing Zheng * Put BL3-1 at the top of the Trusted RAM 22ae7a9352SXing Zheng */ 23ae7a9352SXing Zheng #define BL31_BASE (TZRAM_BASE + 0x1000) 24ae7a9352SXing Zheng #define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE) 25ae7a9352SXing Zheng 26ae7a9352SXing Zheng #endif /*__PLAT_ROCKCHIP_RK3399_INCLUDE_SHARED_BL31_PARAM_H__*/ 27