1*977001aaSXing Zheng /* 2*977001aaSXing Zheng * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3*977001aaSXing Zheng * 4*977001aaSXing Zheng * Redistribution and use in source and binary forms, with or without 5*977001aaSXing Zheng * modification, are permitted provided that the following conditions are met: 6*977001aaSXing Zheng * 7*977001aaSXing Zheng * Redistributions of source code must retain the above copyright notice, this 8*977001aaSXing Zheng * list of conditions and the following disclaimer. 9*977001aaSXing Zheng * 10*977001aaSXing Zheng * Redistributions in binary form must reproduce the above copyright notice, 11*977001aaSXing Zheng * this list of conditions and the following disclaimer in the documentation 12*977001aaSXing Zheng * and/or other materials provided with the distribution. 13*977001aaSXing Zheng * 14*977001aaSXing Zheng * Neither the name of ARM nor the names of its contributors may be used 15*977001aaSXing Zheng * to endorse or promote products derived from this software without specific 16*977001aaSXing Zheng * prior written permission. 17*977001aaSXing Zheng * 18*977001aaSXing Zheng * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*977001aaSXing Zheng * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*977001aaSXing Zheng * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*977001aaSXing Zheng * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*977001aaSXing Zheng * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*977001aaSXing Zheng * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*977001aaSXing Zheng * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*977001aaSXing Zheng * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*977001aaSXing Zheng * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*977001aaSXing Zheng * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*977001aaSXing Zheng * POSSIBILITY OF SUCH DAMAGE. 29*977001aaSXing Zheng */ 30*977001aaSXing Zheng 31*977001aaSXing Zheng #include "rk3399_mcu.h" 32*977001aaSXing Zheng 33*977001aaSXing Zheng #define PMU_PWRMODE_CON 0x20 34*977001aaSXing Zheng #define PMU_POWER_ST 0x78 35*977001aaSXing Zheng 36*977001aaSXing Zheng #define M0_SCR 0xe000ed10 /* System Control Register (SCR) */ 37*977001aaSXing Zheng 38*977001aaSXing Zheng #define SCR_SLEEPDEEP_SHIFT (1 << 2) 39*977001aaSXing Zheng 40*977001aaSXing Zheng void handle_suspend(void) 41*977001aaSXing Zheng { 42*977001aaSXing Zheng unsigned int status_value; 43*977001aaSXing Zheng 44*977001aaSXing Zheng while (1) { 45*977001aaSXing Zheng status_value = mmio_read_32(PMU_BASE + PMU_POWER_ST); 46*977001aaSXing Zheng if (status_value) { 47*977001aaSXing Zheng mmio_clrbits_32(PMU_BASE + PMU_PWRMODE_CON, 0x01); 48*977001aaSXing Zheng return; 49*977001aaSXing Zheng } 50*977001aaSXing Zheng } 51*977001aaSXing Zheng 52*977001aaSXing Zheng /* m0 enter deep sleep mode */ 53*977001aaSXing Zheng mmio_setbits_32(M0_SCR, SCR_SLEEPDEEP_SHIFT); 54*977001aaSXing Zheng } 55