xref: /rk3399_ARM-atf/plat/rockchip/rk3399/drivers/m0/src/rk3399m0.ld.S (revision 977001aa877f90dfbc8033f8b266b7488c442038)
1*977001aaSXing Zheng/*
2*977001aaSXing Zheng * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3*977001aaSXing Zheng *
4*977001aaSXing Zheng * Redistribution and use in source and binary forms, with or without
5*977001aaSXing Zheng * modification, are permitted provided that the following conditions are met:
6*977001aaSXing Zheng *
7*977001aaSXing Zheng * Redistributions of source code must retain the above copyright notice, this
8*977001aaSXing Zheng * list of conditions and the following disclaimer.
9*977001aaSXing Zheng *
10*977001aaSXing Zheng * Redistributions in binary form must reproduce the above copyright notice,
11*977001aaSXing Zheng * this list of conditions and the following disclaimer in the documentation
12*977001aaSXing Zheng * and/or other materials provided with the distribution.
13*977001aaSXing Zheng *
14*977001aaSXing Zheng * Neither the name of ARM nor the names of its contributors may be used
15*977001aaSXing Zheng * to endorse or promote products derived from this software without specific
16*977001aaSXing Zheng * prior written permission.
17*977001aaSXing Zheng *
18*977001aaSXing Zheng * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19*977001aaSXing Zheng * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20*977001aaSXing Zheng * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21*977001aaSXing Zheng * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22*977001aaSXing Zheng * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23*977001aaSXing Zheng * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24*977001aaSXing Zheng * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25*977001aaSXing Zheng * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26*977001aaSXing Zheng * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27*977001aaSXing Zheng * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28*977001aaSXing Zheng * POSSIBILITY OF SUCH DAMAGE.
29*977001aaSXing Zheng */
30*977001aaSXing Zheng
31*977001aaSXing Zheng#include <m0_param.h>
32*977001aaSXing Zheng
33*977001aaSXing ZhengOUTPUT_FORMAT("elf32-littlearm")
34*977001aaSXing Zheng
35*977001aaSXing ZhengSECTIONS {
36*977001aaSXing Zheng	.m0_bin 0 : {
37*977001aaSXing Zheng		KEEP(*(.isr_vector))
38*977001aaSXing Zheng		ASSERT(. == 0xc0, "ISR vector has the wrong size.");
39*977001aaSXing Zheng		ASSERT(. == PARAM_ADDR, "M0 params should go right behind ISR table.");
40*977001aaSXing Zheng		. += PARAM_M0_SIZE;
41*977001aaSXing Zheng		*(.text*)
42*977001aaSXing Zheng		*(.rodata*)
43*977001aaSXing Zheng		*(.data*)
44*977001aaSXing Zheng		*(.bss*)
45*977001aaSXing Zheng		. = ALIGN(8);
46*977001aaSXing Zheng		*(.co_stack*)
47*977001aaSXing Zheng	}
48*977001aaSXing Zheng
49*977001aaSXing Zheng	/DISCARD/ : { *(.comment) *(.note*) }
50*977001aaSXing Zheng}
51