1 /* 2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 #include <assert.h> 31 #include <debug.h> 32 #include <delay_timer.h> 33 #include <errno.h> 34 #include <gpio.h> 35 #include <mmio.h> 36 #include <platform.h> 37 #include <platform_def.h> 38 #include <plat_private.h> 39 #include <soc.h> 40 41 uint32_t gpio_port[] = { 42 GPIO0_BASE, 43 GPIO1_BASE, 44 GPIO2_BASE, 45 GPIO3_BASE, 46 GPIO4_BASE, 47 }; 48 49 #define SWPORTA_DR 0x00 50 #define SWPORTA_DDR 0x04 51 #define EXT_PORTA 0x50 52 53 #define PMU_GPIO_PORT0 0 54 #define PMU_GPIO_PORT1 1 55 56 #define PMU_GRF_GPIO0A_P 0x40 57 #define GRF_GPIO2A_P 0xe040 58 #define GPIO_P_MASK 0x03 59 60 /* 61 * gpio clock disabled when not operate 62 * so need to enable gpio clock before operate gpio 63 * after setting, need to disable gpio clock 64 * gate 1: disable clock; 0: enable clock 65 */ 66 static void gpio_clk(int gpio, uint32_t gate) 67 { 68 uint32_t port = gpio / 32; 69 70 assert(port < 5); 71 72 switch (port) { 73 case 0: 74 mmio_write_32(PMUCRU_BASE + CRU_PMU_CLKGATE_CON(1), 75 BITS_WITH_WMASK(gate, CLK_GATE_MASK, 76 PCLK_GPIO0_GATE_SHIFT)); 77 break; 78 case 1: 79 mmio_write_32(PMUCRU_BASE + CRU_PMU_CLKGATE_CON(1), 80 BITS_WITH_WMASK(gate, CLK_GATE_MASK, 81 PCLK_GPIO1_GATE_SHIFT)); 82 break; 83 case 2: 84 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), 85 BITS_WITH_WMASK(gate, CLK_GATE_MASK, 86 PCLK_GPIO2_GATE_SHIFT)); 87 break; 88 case 3: 89 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), 90 BITS_WITH_WMASK(gate, CLK_GATE_MASK, 91 PCLK_GPIO3_GATE_SHIFT)); 92 93 break; 94 case 4: 95 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), 96 BITS_WITH_WMASK(gate, CLK_GATE_MASK, 97 PCLK_GPIO4_GATE_SHIFT)); 98 break; 99 default: 100 break; 101 } 102 } 103 104 static void set_pull(int gpio, int pull) 105 { 106 uint32_t port = gpio / 32; 107 uint32_t num = gpio % 32; 108 uint32_t bank = num / 8; 109 uint32_t id = num % 8; 110 111 assert((port < 5) && (num < 32)); 112 113 gpio_clk(gpio, 0); 114 115 /* 116 * in gpio0a, gpio0b, gpio2c, gpio2d, 117 * 00: Z 118 * 01: pull down 119 * 10: Z 120 * 11: pull up 121 * different with other gpio, so need to correct it 122 */ 123 if (((port == 0) && (bank < 2)) || ((port == 2) && (bank > 2))) { 124 if (pull == GPIO_PULL_UP) 125 pull = 3; 126 else if (pull == GPIO_PULL_DOWN) 127 pull = 1; 128 else 129 pull = 0; 130 } 131 132 if (port == PMU_GPIO_PORT0 || port == PMU_GPIO_PORT1) { 133 mmio_write_32(PMUGRF_BASE + PMU_GRF_GPIO0A_P + 134 port * 16 + bank * 4, 135 BITS_WITH_WMASK(pull, GPIO_P_MASK, id * 2)); 136 } else { 137 mmio_write_32(GRF_BASE + GRF_GPIO2A_P + 138 (port - 2) * 16 + bank * 4, 139 BITS_WITH_WMASK(pull, GPIO_P_MASK, id * 2)); 140 } 141 gpio_clk(gpio, 1); 142 } 143 144 static void set_direction(int gpio, int direction) 145 { 146 uint32_t port = gpio / 32; 147 uint32_t num = gpio % 32; 148 149 assert((port < 5) && (num < 32)); 150 151 gpio_clk(gpio, 0); 152 153 /* 154 * in gpio.h 155 * #define GPIO_DIR_OUT 0 156 * #define GPIO_DIR_IN 1 157 * but rk3399 gpio direction 1: output, 0: input 158 * so need to revert direction value 159 */ 160 mmio_setbits_32(gpio_port[port] + SWPORTA_DDR, !direction << num); 161 gpio_clk(gpio, 1); 162 } 163 164 static int get_direction(int gpio) 165 { 166 uint32_t port = gpio / 32; 167 uint32_t num = gpio % 32; 168 int direction; 169 170 assert((port < 5) && (num < 32)); 171 172 gpio_clk(gpio, 0); 173 174 /* 175 * in gpio.h 176 * #define GPIO_DIR_OUT 0 177 * #define GPIO_DIR_IN 1 178 * but rk3399 gpio direction 1: output, 0: input 179 * so need to revert direction value 180 */ 181 direction = !((mmio_read_32(gpio_port[port] + 182 SWPORTA_DDR) >> num) & 0x1); 183 gpio_clk(gpio, 1); 184 185 return direction; 186 } 187 188 static int get_value(int gpio) 189 { 190 uint32_t port = gpio / 32; 191 uint32_t num = gpio % 32; 192 int value; 193 194 assert((port < 5) && (num < 32)); 195 196 gpio_clk(gpio, 0); 197 value = (mmio_read_32(gpio_port[port] + EXT_PORTA) >> num) & 0x1; 198 gpio_clk(gpio, 1); 199 200 return value; 201 } 202 203 static void set_value(int gpio, int value) 204 { 205 uint32_t port = gpio / 32; 206 uint32_t num = gpio % 32; 207 208 assert((port < 5) && (num < 32)); 209 210 gpio_clk(gpio, 0); 211 mmio_clrsetbits_32(gpio_port[port] + SWPORTA_DR, 1 << num, 212 !!value << num); 213 gpio_clk(gpio, 0); 214 } 215 216 const gpio_ops_t rk3399_gpio_ops = { 217 .get_direction = get_direction, 218 .set_direction = set_direction, 219 .get_value = get_value, 220 .set_value = set_value, 221 .set_pull = set_pull, 222 }; 223 224 void plat_rockchip_gpio_init(void) 225 { 226 gpio_init(&rk3399_gpio_ops); 227 } 228