12831bc3aSCaesar Wang /* 22831bc3aSCaesar Wang * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 32831bc3aSCaesar Wang * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 52831bc3aSCaesar Wang */ 62831bc3aSCaesar Wang 72831bc3aSCaesar Wang #ifndef __SOC_ROCKCHIP_RK3399_SUSPEND_H__ 82831bc3aSCaesar Wang #define __SOC_ROCKCHIP_RK3399_SUSPEND_H__ 92831bc3aSCaesar Wang #include <dram.h> 102831bc3aSCaesar Wang 112831bc3aSCaesar Wang #define KHz (1000) 122831bc3aSCaesar Wang #define MHz (1000 * KHz) 132831bc3aSCaesar Wang #define GHz (1000 * MHz) 142831bc3aSCaesar Wang 152831bc3aSCaesar Wang #define PI_CA_TRAINING (1 << 0) 162831bc3aSCaesar Wang #define PI_WRITE_LEVELING (1 << 1) 172831bc3aSCaesar Wang #define PI_READ_GATE_TRAINING (1 << 2) 182831bc3aSCaesar Wang #define PI_READ_LEVELING (1 << 3) 192831bc3aSCaesar Wang #define PI_WDQ_LEVELING (1 << 4) 202831bc3aSCaesar Wang #define PI_FULL_TRAINING (0xff) 212831bc3aSCaesar Wang 22*9aadf25cSLin Huang void dmc_suspend(void); 23*9aadf25cSLin Huang __pmusramfunc void dmc_resume(void); 242831bc3aSCaesar Wang 252831bc3aSCaesar Wang #endif /* __DRAM_H__ */ 26