xref: /rk3399_ARM-atf/plat/rockchip/rk3399/drivers/dram/dfs.h (revision 9d068f66b15e644df4961b74b965323c20f21f14)
1613038bcSCaesar Wang /*
2613038bcSCaesar Wang  * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3613038bcSCaesar Wang  *
482cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
5613038bcSCaesar Wang  */
6613038bcSCaesar Wang 
7*c3cf06f1SAntonio Nino Diaz #ifndef DFS_H
8*c3cf06f1SAntonio Nino Diaz #define DFS_H
9613038bcSCaesar Wang 
10fb83888bSPaul Kocialkowski #include <stdint.h>
11fb83888bSPaul Kocialkowski 
12613038bcSCaesar Wang struct rk3399_sdram_default_config {
13613038bcSCaesar Wang 	unsigned char bl;
14613038bcSCaesar Wang 	/* 1:auto precharge, 0:never auto precharge */
15613038bcSCaesar Wang 	unsigned char ap;
16613038bcSCaesar Wang 	/* dram driver strength */
17613038bcSCaesar Wang 	unsigned char dramds;
18613038bcSCaesar Wang 	/* dram ODT, if odt=0, this parameter invalid */
19613038bcSCaesar Wang 	unsigned char dramodt;
20613038bcSCaesar Wang 	/* ca ODT, if odt=0, this parameter invalid
21613038bcSCaesar Wang 	 * only used by LPDDR4
22613038bcSCaesar Wang 	 */
23613038bcSCaesar Wang 	unsigned char caodt;
24613038bcSCaesar Wang 	unsigned char burst_ref_cnt;
25613038bcSCaesar Wang 	/* zqcs period, unit(s) */
26613038bcSCaesar Wang 	unsigned char zqcsi;
27613038bcSCaesar Wang };
28613038bcSCaesar Wang 
29613038bcSCaesar Wang struct drv_odt_lp_config {
30613038bcSCaesar Wang 	uint32_t pd_idle;
31613038bcSCaesar Wang 	uint32_t sr_idle;
32613038bcSCaesar Wang 	uint32_t sr_mc_gate_idle;
33613038bcSCaesar Wang 	uint32_t srpd_lite_idle;
34613038bcSCaesar Wang 	uint32_t standby_idle;
35f91b969cSDerek Basehore 	uint32_t odt_en;
36613038bcSCaesar Wang 
37613038bcSCaesar Wang 	uint32_t dram_side_drv;
38613038bcSCaesar Wang 	uint32_t dram_side_dq_odt;
39613038bcSCaesar Wang 	uint32_t dram_side_ca_odt;
40613038bcSCaesar Wang };
41613038bcSCaesar Wang 
42613038bcSCaesar Wang uint32_t ddr_set_rate(uint32_t hz);
43613038bcSCaesar Wang uint32_t ddr_round_rate(uint32_t hz);
44613038bcSCaesar Wang uint32_t ddr_get_rate(void);
45f91b969cSDerek Basehore uint32_t dram_set_odt_pd(uint32_t arg0, uint32_t arg1, uint32_t arg2);
46f91b969cSDerek Basehore void dram_dfs_init(void);
474bd1d3faSDerek Basehore void ddr_prepare_for_sys_suspend(void);
484bd1d3faSDerek Basehore void ddr_prepare_for_sys_resume(void);
494bd1d3faSDerek Basehore 
50*c3cf06f1SAntonio Nino Diaz #endif /* DFS_H */
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