1613038bcSCaesar Wang /* 2613038bcSCaesar Wang * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3613038bcSCaesar Wang * 4*82cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5613038bcSCaesar Wang */ 6613038bcSCaesar Wang 7613038bcSCaesar Wang #ifndef __SOC_ROCKCHIP_RK3399_DFS_H__ 8613038bcSCaesar Wang #define __SOC_ROCKCHIP_RK3399_DFS_H__ 9613038bcSCaesar Wang 10613038bcSCaesar Wang struct rk3399_sdram_default_config { 11613038bcSCaesar Wang unsigned char bl; 12613038bcSCaesar Wang /* 1:auto precharge, 0:never auto precharge */ 13613038bcSCaesar Wang unsigned char ap; 14613038bcSCaesar Wang /* dram driver strength */ 15613038bcSCaesar Wang unsigned char dramds; 16613038bcSCaesar Wang /* dram ODT, if odt=0, this parameter invalid */ 17613038bcSCaesar Wang unsigned char dramodt; 18613038bcSCaesar Wang /* ca ODT, if odt=0, this parameter invalid 19613038bcSCaesar Wang * only used by LPDDR4 20613038bcSCaesar Wang */ 21613038bcSCaesar Wang unsigned char caodt; 22613038bcSCaesar Wang unsigned char burst_ref_cnt; 23613038bcSCaesar Wang /* zqcs period, unit(s) */ 24613038bcSCaesar Wang unsigned char zqcsi; 25613038bcSCaesar Wang }; 26613038bcSCaesar Wang 27613038bcSCaesar Wang struct drv_odt_lp_config { 28613038bcSCaesar Wang uint32_t pd_idle; 29613038bcSCaesar Wang uint32_t sr_idle; 30613038bcSCaesar Wang uint32_t sr_mc_gate_idle; 31613038bcSCaesar Wang uint32_t srpd_lite_idle; 32613038bcSCaesar Wang uint32_t standby_idle; 33f91b969cSDerek Basehore uint32_t odt_en; 34613038bcSCaesar Wang 35613038bcSCaesar Wang uint32_t dram_side_drv; 36613038bcSCaesar Wang uint32_t dram_side_dq_odt; 37613038bcSCaesar Wang uint32_t dram_side_ca_odt; 38613038bcSCaesar Wang }; 39613038bcSCaesar Wang 40613038bcSCaesar Wang uint32_t ddr_set_rate(uint32_t hz); 41613038bcSCaesar Wang uint32_t ddr_round_rate(uint32_t hz); 42613038bcSCaesar Wang uint32_t ddr_get_rate(void); 43f91b969cSDerek Basehore uint32_t dram_set_odt_pd(uint32_t arg0, uint32_t arg1, uint32_t arg2); 44f91b969cSDerek Basehore void dram_dfs_init(void); 454bd1d3faSDerek Basehore void ddr_prepare_for_sys_suspend(void); 464bd1d3faSDerek Basehore void ddr_prepare_for_sys_resume(void); 474bd1d3faSDerek Basehore 48613038bcSCaesar Wang #endif 49